Bootloader Unlock Ideas - Fire Android Development

Hi Guys I have been messing with Bootloader unlock ideas and wanted to share some of my thoughts on it. I really dont know much about it but here is what i have found so far
I know that if i reboot to fastboot mode with
Code:
adb reboot bootloader
I can run getvar all and see this unlock_code
Code:
fastboot getvar all
(bootloader) max-download-size: 134217728
(bootloader) partition-size:userdata: 17329be00
(bootloader) partition-type:userdata: unknown
(bootloader) partition-size:cache: fa00000
(bootloader) partition-type:cache: unknown
(bootloader) partition-size:system: 4b000000
(bootloader) partition-type:system: unknown
(bootloader) partition-size:TEE2: 500000
(bootloader) partition-type:TEE2: unknown
(bootloader) partition-size:TEE1: 500000
(bootloader) partition-type:TEE1: unknown
(bootloader) partition-size:LOGO: 380000
(bootloader) partition-type:LOGO: unknown
(bootloader) partition-size:MISC: 80000
(bootloader) partition-type:MISC: unknown
(bootloader) partition-size:recovery: 1000000
(bootloader) partition-type:recovery: unknown
(bootloader) partition-size:boot: 1000000
(bootloader) partition-type:boot: unknown
(bootloader) partition-size:UBOOT: 100000
(bootloader) partition-type:UBOOT: unknown
(bootloader) partition-size:EXPDB: 1160000
(bootloader) partition-type:EXPDB: unknown
(bootloader) partition-size:DKB: 100000
(bootloader) partition-type:DKB: unknown
(bootloader) partition-size:KB: 100000
(bootloader) partition-type:KB: unknown
(bootloader) off-mode-charge: 1
(bootloader) secure: yes
(bootloader) kernel: lk
(bootloader) product: FORD
(bootloader) version: 0.5
(bootloader) unlock_status: false
(bootloader) unlock_version: 1
(bootloader) unlock_code: 0x32c5657dd83d5139
(bootloader) prod: 1
all: Done!!
I also know that the command to unlock the bootloader
Code:
fastboot flash unlock unlock.bin
Code:
C:\Development\adt-bundle-windows-x86_64-20130729\sdk\platform-tools>fastboot fl
ash unlock "H:\Tom Stuff\Amazon Fire 7in 5th gen Ford\unlock.bin"
target reported max download size of 134217728 bytes
sending 'unlock' (0 KB)...
OKAY [ 0.015s]
writing 'unlock'...
FAILED (remote: unlock code error)
finished. total time: 0.028s
I also ran idme print with root access and got back this
Code:
[email protected]:/ $ su
[email protected]:/ # idme print
board_id: 0025001040000015
serial: G0K0H40453870FHX
mac_addr: F0272D525FE6
mac_sec: 3E9WML8GV8BJH6Z1CD88
bt_mac_addr: 00BB3A0BFFEE
product_name: 0
productid: 0
productid2: 0
bootmode: 0
postmode: 0
bootcount: 90
manufacturing:
unlock_code:
sensorcal: 480000000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000
register_tag: 715aa2763b01f250
KB:
4b 42 50 46 18 0e 00 00 28 0e
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
DKB:
30 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
device_type_id: A2M4YX06LWP8WI
dev_flags: 0
fos_flags: 0
usr_flags: 0
At this point i have tried creating a couple different unlock.bin's with this unlock code and even changing it to decimal instead of hexadecimal but really i am lost here was hoping someone with a little more info and experiance might be able to help thanks.

Seems interesting but I doubt it will be this easy.

I can't wait to see what you all do with this!

You've probably tried this, but use the unlock code as a parameter, so fastboot flash unlock 0xABCD etc. Also, fastboot flash unlock isn't a stock fastboot command, it might be Amazon's , but not stock. Try fastboot oem unlock, or the new commands, fastboot flashing unlock or fastboot flashing unlock-critical.
---------- Post added at 08:41 PM ---------- Previous post was at 08:39 PM ----------
Also try fastboot flash unlocktoken unlock.bin

Koopa777 said:
You've probably tried this, but use the unlock code as a parameter, so fastboot flash unlock 0xABCD etc. Also, fastboot flash unlock isn't a stock fastboot command, it might be Amazon's , but not stock. Try fastboot oem unlock, or the new commands, fastboot flashing unlock or fastboot flashing unlock-critical.
---------- Post added at 08:41 PM ---------- Previous post was at 08:39 PM ----------
Also try fastboot flash unlocktoken unlock.bin
Click to expand...
Click to collapse
good ideas but i have already tried all of those first before this post but ideas are welcome

I don't have a Windows installation ATM. Has anyone tried sp flash tool for mediatek devices?
EDIT: I played a bit with MTK droid tools to create a scatter file, but no luck (so it seems SP tools are a no go). I also tried some shady Mediatek tools. Also with no luck. My take is that unlocking via fastboot may not work at all. Maybe look into mediatek stuff to unlock the Fire.

Keep at it guys! Apparently Android 6.0/CM13 isn't doable until bootloader unlocked. This is probably best tablet around $50 with probably fairly large sales. Worth the effort.

As far as I know, that unlock code that fastboot gives is much like Motorola's unlock setup... The device's code is hashed/SHA/etc with a master key, spits out a device unlock code that you can give fastboot.

xenokc said:
Apparently Android 6.0/CM13 isn't doable until bootloader unlocked. This is probably best tablet around $50 with probably fairly large sales. Worth the effort.
Click to expand...
Click to collapse
We should just need kexec.

Idk but I need some marshmallow love
Sent from my KFFOWI using Tapatalk

This has been discussed a bit in other threads
Amazon Fire Bootloader unlock code?? by @Awesomeslayerg
Working Bootable recovery for the KFFOWI (Ford) by @Vlasp

I have a similar thread in the HD 8 & 10 section, but nothing you have not found already.

ok so i dont really know where to post this but i am trying to adb shell dd my mmcblk0 file and i got a img that was 4ggs and now i try to dd blahblah skip=4294967295 but i get an error "dd: dev/block/mmcblk0: Invalid argument"almost 100 percent that it is the same file iwas using before all i did was exit the shell (2 times i was root) and adb pull the mmcblk0.img from the ../sdcard2/ it took a few minutes and i just went on to procede with the skip=4ggs and got the error dont want to try to reboot incase i fd it up. ok i figured it out i just changed it to skip=40049... hopefully i can still merge the two together later.

Tomsgt said:
Hi Guys I have been messing with Bootloader unlock ideas and wanted to share some of my thoughts on it. I really dont know much about it but here is what i have found so far
I know that if i reboot to fastboot mode with
Code:
adb reboot bootloader
I can run getvar all and see this unlock_code
Code:
fastboot getvar all
(bootloader) max-download-size: 134217728
(bootloader) partition-size:userdata: 17329be00
(bootloader) partition-type:userdata: unknown
(bootloader) partition-size:cache: fa00000
(bootloader) partition-type:cache: unknown
(bootloader) partition-size:system: 4b000000
(bootloader) partition-type:system: unknown
(bootloader) partition-size:TEE2: 500000
(bootloader) partition-type:TEE2: unknown
(bootloader) partition-size:TEE1: 500000
(bootloader) partition-type:TEE1: unknown
(bootloader) partition-size:LOGO: 380000
(bootloader) partition-type:LOGO: unknown
(bootloader) partition-size:MISC: 80000
(bootloader) partition-type:MISC: unknown
(bootloader) partition-size:recovery: 1000000
(bootloader) partition-type:recovery: unknown
(bootloader) partition-size:boot: 1000000
(bootloader) partition-type:boot: unknown
(bootloader) partition-size:UBOOT: 100000
(bootloader) partition-type:UBOOT: unknown
(bootloader) partition-size:EXPDB: 1160000
(bootloader) partition-type:EXPDB: unknown
(bootloader) partition-size:DKB: 100000
(bootloader) partition-type:DKB: unknown
(bootloader) partition-size:KB: 100000
(bootloader) partition-type:KB: unknown
(bootloader) off-mode-charge: 1
(bootloader) secure: yes
(bootloader) kernel: lk
(bootloader) product: FORD
(bootloader) version: 0.5
(bootloader) unlock_status: false
(bootloader) unlock_version: 1
(bootloader) unlock_code: 0x32c5657dd83d5139
(bootloader) prod: 1
all: Done!!
I also know that the command to unlock the bootloader
Code:
fastboot flash unlock unlock.bin
Code:
C:\Development\adt-bundle-windows-x86_64-20130729\sdk\platform-tools>fastboot fl
ash unlock "H:\Tom Stuff\Amazon Fire 7in 5th gen Ford\unlock.bin"
target reported max download size of 134217728 bytes
sending 'unlock' (0 KB)...
OKAY [ 0.015s]
writing 'unlock'...
FAILED (remote: unlock code error)
finished. total time: 0.028s
I also ran idme print with root access and got back this
Code:
[email protected]:/ $ su
[email protected]:/ # idme print
board_id: 0025001040000015
serial: G0K0H40453870FHX
mac_addr: F0272D525FE6
mac_sec: 3E9WML8GV8BJH6Z1CD88
bt_mac_addr: 00BB3A0BFFEE
product_name: 0
productid: 0
productid2: 0
bootmode: 0
postmode: 0
bootcount: 90
manufacturing:
unlock_code:
sensorcal: 480000000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000
register_tag: 715aa2763b01f250
KB:
4b 42 50 46 18 0e 00 00 28 0e
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
DKB:
30 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
device_type_id: A2M4YX06LWP8WI
dev_flags: 0
fos_flags: 0
usr_flags: 0
At this point i have tried creating a couple different unlock.bin's with this unlock code and even changing it to decimal instead of hexadecimal but really i am lost here was hoping someone with a little more info and experiance might be able to help thanks.
Click to expand...
Click to collapse
Ok so i dont know if any of this will help but....
Code:
[email protected]:/ # idme print
board_id: 0025001050010015
serial: G000H4045445154K
mac_addr: F0272D9D13E0
mac_sec: 3ECQJN1SLTE1HRUQ770F
bt_mac_addr: 84D6D0221452
product_name: 0
productid: 0
productid2: 0
bootmode: 0
postmode: 0
bootcount: 64
manufacturing: PSN=P00082035443042S FSN=3862080402143
unlock_code:
sensorcal: 4800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
register_tag: 715aa2763b01f250
KB:
4b 42 50 46 18 0e 00 00 28 0e
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
DKB:
30 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
device_type_id: A2M4YX06LWP8WI
dev_flags: 0
fos_flags: 0
usr_flags: 0
[email protected]:/ #
And
Code:
fastboot getvar all
(bootloader) max-download-size: 134217728
(bootloader) partition-size:userdata: 17329be00
(bootloader) partition-type:userdata: unknown
(bootloader) partition-size:cache: fa00000
(bootloader) partition-type:cache: unknown
(bootloader) partition-size:system: 4b000000
(bootloader) partition-type:system: unknown
(bootloader) partition-size:TEE2: 500000
(bootloader) partition-type:TEE2: unknown
(bootloader) partition-size:TEE1: 500000
(bootloader) partition-type:TEE1: unknown
(bootloader) partition-size:LOGO: 380000
(bootloader) partition-type:LOGO: unknown
(bootloader) partition-size:MISC: 80000
(bootloader) partition-type:MISC: unknown
(bootloader) partition-size:recovery: 1000000
(bootloader) partition-type:recovery: unknown
(bootloader) partition-size:boot: 1000000
(bootloader) partition-type:boot: unknown
(bootloader) partition-size:UBOOT: 100000
(bootloader) partition-type:UBOOT: unknown
(bootloader) partition-size:EXPDB: 1160000
(bootloader) partition-type:EXPDB: unknown
(bootloader) partition-size:DKB: 100000
(bootloader) partition-type:DKB: unknown
(bootloader) partition-size:KB: 100000
(bootloader) partition-type:KB: unknown
(bootloader) off-mode-charge: 1
(bootloader) secure: yes
(bootloader) kernel: lk
(bootloader) product: FORD
(bootloader) version: 0.5
(bootloader) unlock_status: false
(bootloader) unlock_version: 1
(bootloader) unlock_code: 0x444d63d061775c38
(bootloader) prod: 1
all: Done!!
finished. total time: 0.012s
if there is anything i can do/donate to help such as Raw image files or logs let me know i have Amazon Fire 5.1.1 rooted after ota, it updated overnight before i could look anything up, my wife got this for xmas, with gapps framework, hidden fireos launcher, and hidden ota's and such, can use fastboot oem append-cmdline "androidboot.unlocked_kernel=true" to run adb as root and remount my file system, and i am going to pull a full mmcblk0 raw binary image tonight hopefully it will work. going to run some file system forensics on the image and hopefully find some hidden or deleted files from when devices where manufactured.

serial console output
I bought one of these 7-inch Fire Tablets (5th generation) during the $35 sale a few weeks back. I purchased it from a big chain store, so it has model SV98LN rather than the KFFOWI reported by others in this forum, but everything else seems the same. After removing the rear panel, I looked around for test points on the motherboard. There were two conveniently labeled TX and RX. Poking around with a multimeter revealed that things were running at 1.8v. I found a good places to attach leads for VCC and GND, and connected them along with TX and RX to a spare FD232R-based serial adapter.
At 115200 baud (on-chip boot rom):
Code:
[DL] 00000000 00000000 010701
PR: 0001 01A6
F3: 0000 0000
V0: 0000 0000 [0001]
00: 1027 0002
01: 0000 0000
BP: 0000 0059
G0: 0182 0000
T0: 0000 0418
Jump to BL
Then at 921600 baud (preloader):
Code:
[USBD] USB PRB0 LineState: 0
[USBD] USB cable/ No Cable inserted!
[PLFM] Keep stay in USB Mode
Platform initialization is ok
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
wait for frequency meter finish, CLK26CALI = 0x90
mt_pll_post_init: mt_get_bus_freq = 273000Khz
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_mem_freq = 333251Khz
[PWRAP] pwrap_init_preloader
[PWRAP] pwrap_init
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=1,rdata=800
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=2 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=3 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=9,rdata=1001
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=10,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=2003
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
[PWRAP] _pwrap_init_reg_clock
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic6323_init] Preloader Start..................
[pmic6323_init] PMIC CHIP Code = 0x2023
INT_MISC_CON: 0 TOP_RST_MISC: 0
pl pmic powerkey Release
[pmic6323_init] powerKey = 0
[pmic6323_init] is USB in = 0xB003
[pmic6323_init] Reg[0x11A]=0x1B
[pmic6323_init] Done...................
[PLFM] Init I2C: OK(0)
[PLFM] Init PWRAP: OK(0)
[PLFM] Init PMIC: OK(0)
[PLFM] chip[CA00]
[BLDR] Build Time: 20150730-164940
At this point the port switches back to 115200 baud, emits "READY", and waits briefly for input (in case the flash programming tool is connected). After a short time, it switches back to 921000 baud and continues.
Code:
==== Dump RGU Reg ========
RGU MODE: 4D
RGU LENGTH: FFE0
RGU STA: 0
RGU INTERVAL: FFF
RGU SWSYSRST: 0
==== Dump RGU Reg End ====
RGU: g_rgu_satus:0
mtk_wdt_mode_config mode value=10, tmp:22000010
PL P ON
WDT does not trigger reboot
mtk_wdt_mode_config mode value=5D, tmp:2200005D
RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
kpd read addr: 0x0040: data:0x4001
Enter mtk_kpd_gpio_set!
kpd debug column : -2147483612, -2147483611, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
after set KP enable: KP_SEL = 0x0 !
MTK_PMIC_RST_KEY is used for this project!
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=3968
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0xE, con = 0xBFFA
rtc_first_boot_init
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=3968
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
rtc_2sec_stat_clear
rtc_2sec_reboot_check cali=1536
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0xC0, spar1 = 0x800
[RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
[RTC] bbpu = 0xE, con = 0x426, cali = 0x600
pl pmic powerkey Release
hw_set_cc: 450
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1
[0xF]=0x1
[0x10]=0x0
[0x11]=0x0
[0x12]=0x0
[0x13]=0x0
[0x14]=0x60
[0x15]=0x60
[0x16]=0x0
[0x17]=0x0
[0x18]=0x0
[0x19]=0x0
[0x1A]=0x10
[0x1B]=0x10
[0x1C]=0x0
[0x1D]=0x0
[0x1E]=0x1
[0x1F]=0x1
[0x20]=0x1
[0x21]=0x1
[0x22]=0x0
[0x23]=0x0
[0x24]=0x0
[0x25]=0x0
[0x26]=0x0
[0x27]=0x0
[0x28]=0x21
[0x29]=0x21
[0x2A]=0x14
[0x2B]=0x14
[0x2C]=0x44
[0x2D]=0x44
[0x2E]=0x54
[0x2F]=0x54
[0x30]=0x0
[0x31]=0x0
[0x32]=0x0
[0x33]=0x0
[0x34]=0x0
[0x35]=0x0
[0x36]=0x0
[0x37]=0x0
[0x38]=0x55
[0x39]=0x55
[0x3A]=0x0
hw_set_cc: done
[PLFM] USB/charger boot!
hw_set_cc: 450
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1
[0xF]=0x1
[0x10]=0x0
[0x11]=0x0
[0x12]=0x0
[0x13]=0x0
[0x14]=0x60
[0x15]=0x60
[0x16]=0x0
[0x17]=0x0
[0x18]=0x0
[0x19]=0x0
[0x1A]=0x10
[0x1B]=0x10
[0x1C]=0x0
[0x1D]=0x0
[0x1E]=0x1
[0x1F]=0x1
[0x20]=0x1
[0x21]=0x1
[0x22]=0x0
[0x23]=0x0
[0x24]=0x0
[0x25]=0x0
[0x26]=0x0
[0x27]=0x0
[0x28]=0x21
[0x29]=0x21
[0x2A]=0x14
[0x2B]=0x14
[0x2C]=0x44
[0x2D]=0x44
[0x2E]=0x54
[0x2F]=0x54
[0x30]=0x0
[0x31]=0x0
[0x32]=0x0
[0x33]=0x0
[0x34]=0x0
[0x35]=0x0
[0x36]=0x0
[0x37]=0x0
[0x38]=0x55
[0x39]=0x55
[0x3A]=0x0
hw_set_cc: done
[RTC] Check SW Long Press RST = 0xC0
[RTC] rtc_bbpu_power_on done
[SD0] Bus Width: 1
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(193) DS(0) RS(0)
[SD0] Switch to High-Speed mode!
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) DIV(96) DS(0) RS(0)
[SD0] Bus Width: 8
[SD0] Size: 7456 MB, Max.Speed: 52000 kHz, blklen(512), nblks(15269888), ro(0)
[SD0] Initialized
[SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) DIV(0) DS(0) RS(0)
msdc_ett_offline_to_pl: size<2> m_id<0x90>
msdc <0> <HYNIX > <H8G1e>
msdc <1> <xxxxxx> <H8G1e>
msdc failed to find
[EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0
mt_get_dram_type() 0x3
[EMI] LPDDR3
[Check]mt_get_mdl_number 0x0
[EMI] eMMC/NAND ID = 90,1,4A,48,38,47,31,65,5,7,D0,C8,D4,FA,82,CB
[EMI] MDL number = 0
[EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
[EMI][Vcore]0x21E=0x48,0x220=0x48
[EMI][Vmem]0x554=0xF
[EMI] LPDDR3 DRAM Clock = 1333 MHz, MEMPLL MODE = 2
[EMI] PCDDR3 RXTDN Calibration:
Start REXTDN SW calibration...
PD 0x1e4[13]:0h
1.INTREF_SEL:0x100[17:16]:0h
2.enable P drive (initial settings),DRAMC_DLLSEL:500F0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:500F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:510F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:520F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:530F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:540F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:550F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:560F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:570F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:580F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:590F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5A0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5B0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5C0F0h
2.2.CMPOT:0x3dc[31]:80000000h
P drive:12
3.INTREF_SEL:0x100[17:16]:0h
4.enable N drive (initial settings),DRAMC_DLLSEL:3C0FFh
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C0FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C1FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C2FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C3FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C4FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C5FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C6FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C7FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C8FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3C9FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3CAFFh
4.2.CMPOT:0x3dc[31]:0h
N drive:9
drvp=0xC,drvn=0x9
=============================================
X-axis: DQS Gating Window Delay (Fine Scale)
Y-axis: DQS Gating Window Delay (Coarse Scale)
=============================================
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
0013:| 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1
0014:| 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0
0015:| 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
0016:| 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Rank 13 coarse tune value selection : 32,
20
64
rank 0 coarse = 20
rank 0 fine = 64
00:| 0 0 0 0 1 1 1 0
opt_dle value:9
[EMI]warning:rank auto detect:==single rank==
Change CMD/ADDR output delay = 15
Change CLK output delay = 15
20
80
Change CMD/ADDR output delay = 14
Change CLK output delay = 14
20
80
Change CMD/ADDR output delay = 13
Change CLK output delay = 13
20
80
Change CMD/ADDR output delay = 12
Change CLK output delay = 12
20
80
Change CMD/ADDR output delay = 11
Change CLK output delay = 11
20
80
Change CMD/ADDR output delay = 0
Change CLK output delay = 0
20
64
byte:0, (DQS,DQ)=(8,9)
byte:1, (DQS,DQ)=(8,A)
byte:2, (DQS,DQ)=(8,8)
byte:3, (DQS,DQ)=(8,8)
[EMI] DRAMC calibration passed
[MEM] complex R/W mem test pass
0:dram_rank_size:40000000
[Dram_Buffer] dram size:1073741824
[Dram_Buffer] structure size: 1557624
[Dram_Buffer] MAX_TEE_DRAM_SIZE: 268435456
<< binary spew, perhaps signature from nvram? >>
sram(0xC10C983F) sig mismatch
RAM_CONSOLE start: 0x83F00000, size: 0x4000
RAM_CONSOLE wdt status (0x0)=0x0
[PLFM] Init Boot Device: OK(0)
Enter mtk_kpd_gpio_set!
kpd debug column : -2147483612, -2147483611, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
[PART] GPT dump
[PART] 1: 00000800 00000800 'KB'
[PART] 2: 00000800 00001000 'DKB'
[PART] 3: 00008B00 00001800 'EXPDB'
[PART] 4: 00000800 0000A300 'UBOOT'
[PART] 5: 00008000 0000AB00 'boot'
[PART] 6: 00008000 00012B00 'recovery'
[PART] 7: 00000400 0001AB00 'MISC'
[PART] 8: 00001C00 0001AF00 'LOGO'
[PART] 9: 00002800 0001CB00 'TEE1'
[PART] 10: 00002800 0001F300 'TEE2'
[PART] 11: 00258000 00021B00 'system'
[PART] 12: 0007D000 00279B00 'cache'
[PART] 13: 00B994DF 002F6B00 'userdata'
[LIB] HW ENC
[platform_vusb_on] PASS
step A2 : Standard USB Host!
[PLFM] USB cable in
No Battery
[0xE]=0x1005
[TOOL] USB enum timeout (Yes), handshake timeout(Yes)
USB HW reg: index14=0x0
[USBD] USB Full Speed
[TOOL] Enumeration(Start)
[USBD] USB High Speed
[TOOL] Enumeration(End): OK 616ms
[TOOL] : usb listen timeout
[TOOL] <USB> cannot detect tools!
[TOOL] <UART> listen ended, receive size:0!
[TOOL] <UART> wait sync time 150ms->5ms
[TOOL] <UART> receieved data: ()
Device APC domain init setup:
mmc_rpmb_get_wc, mmc_set_part_config done!!
mmc_rpmb_send_command -> req_type=0x1, type=0x2, blks=0x1
mmc_rpmb_send_command -> req_type=0x2, type=0x2, blks=0x1
mmc_rpmb_get_wc, rpmb_req.result=0
[RPMB] RPMB Provisioned
mmc_rpmb_send_command -> req_type=0x1, type=0x4, blks=0x1
mmc_rpmb_send_command -> req_type=0x2, type=0x4, blks=0x1
[RPMB] Valid anti-rollback block exists
[PART] Image with part header
[PART] name : LK
[PART] addr : FFFFFFFFh mode : -1
[PART] size : 409428
[PART] magic: 58881688h
[SECURITY]: Production device
[PART] This is a production device.
[PART] Verifying LK...
[VERIFY_LK] Succeed to pass the LK verification.
[PART] load "3" from 0x0000000001460200 (dev) to 0x81E00000 (mem) [SUCCESS]
[PART] load speed: 2960KB/s, 409428 bytes, 135ms
0:dram_rank_size:40000000
DRAM size is 0x40000000
[PART] Image with part header
[PART] name : TEE
[PART] addr : FFFFFFFFh mode : -1
[PART] size : 1063936
[PART] magic: 58881688h
[PART] load "8" from 0x0000000003960200 (dev) to 0xBFF00000 (mem) [SUCCESS]
[PART] load speed: 74213KB/s, 1063936 bytes, 14ms
[PART] Image with part header
[PART] name : TEE
[PART] addr : FFFFFFFFh mode : -1
[PART] size : 1063936
[PART] magic: 58881688h
[PART] load "8" from 0x0000000003960200 (dev) to 0xB8A00000 (mem) [SUCCESS]
[PART] load speed: 79922KB/s, 1063936 bytes, 13ms
[BLMTEE] sha256 takes 6 (ms) for 1063360 bytes
[BLMTEE] rsa2048 takes 117 (ms)
[BLMTEE] verify pkcs#1 pss: 1 (ms)
[BLMTEE] aes128cbc 9 (ms) for 1063360
[ANTI-ROLLBACK] Processing anti-rollback data
mmc_rpmb_send_command -> req_type=0x1, type=0x4, blks=0x1
mmc_rpmb_send_command -> req_type=0x2, type=0x4, blks=0x1
[ANTI-ROLLBACK] PL: 2 TEE: 3002 LK: 2
[ANTI-ROLLBACK] Checksum validated
[ANTI-ROLLBACK] All checks passed
No Battery
[0xE]=0x1005
hw_set_cc: 450
[0x0]=0x6B
[0x1]=0x6B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1005
[0xF]=0x1005
[0x10]=0x0
[0x11]=0x0
[0x12]=0x0
[0x13]=0x0
[0x14]=0x60
[0x15]=0x60
[0x16]=0x0
[0x17]=0x0
[0x18]=0x0
[0x19]=0x0
[0x1A]=0x10
[0x1B]=0x10
[0x1C]=0x0
[0x1D]=0x0
[0x1E]=0x1
[0x1F]=0x1
[0x20]=0x1
[0x21]=0x1
[0x22]=0x0
[0x23]=0x0
[0x24]=0x3
[0x25]=0x3
[0x26]=0x0
[0x27]=0x0
[0x28]=0x21
[0x29]=0x21
[0x2A]=0x14
[0x2B]=0x14
[0x2C]=0x44
[0x2D]=0x44
[0x2E]=0x54
[0x2F]=0x54
[0x30]=0x0
[0x31]=0x0
[0x32]=0x0
[0x33]=0x0
[0x34]=0x0
[0x35]=0x0
[0x36]=0x0
[0x37]=0x0
[0x38]=0x55
[0x39]=0x55
[0x3A]=0x0
hw_set_cc: done
[PLFM] Wait for battery inserted...
pl pmic close pre-chr LED
pl charging en
hw_set_cc: 450
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1005
[0xF]=0x1005
[0x10]=0x0
[0x11]=0x0
[0x12]=0x0
[0x13]=0x0
[0x14]=0x60
[0x15]=0x60
[0x16]=0x0
[0x17]=0x0
[0x18]=0x0
[0x19]=0x0
[0x1A]=0x10
[0x1B]=0x10
[0x1C]=0x0
[0x1D]=0x0
[0x1E]=0x1
[0x1F]=0x1
[0x20]=0x1
[0x21]=0x1
[0x22]=0x0
[0x23]=0x0
[0x24]=0x3
[0x25]=0x3
[0x26]=0x0
[0x27]=0x0
[0x28]=0x21
[0x29]=0x21
[0x2A]=0x14
[0x2B]=0x14
[0x2C]=0x4
[0x2D]=0x4
[0x2E]=0x54
[0x2F]=0x54
[0x30]=0x0
[0x31]=0x0
[0x32]=0x0
[0x33]=0x0
[0x34]=0x0
[0x35]=0x0
[0x36]=0x0
[0x37]=0x0
[0x38]=0x55
[0x39]=0x55
[0x3A]=0x0
hw_set_cc: done
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1005
[0xF]=0x1005
[0x10]=0x0
[0x11]=0x0
[0x12]=0x0
[0x13]=0x0
[0x14]=0x60
[0x15]=0x60
[0x16]=0x0
[0x17]=0x0
[0x18]=0x0
[0x19]=0x0
[0x1A]=0x10
[0x1B]=0x10
[0x1C]=0x0
[0x1D]=0x0
[0x1E]=0x1
[0x1F]=0x1
[0x20]=0x9
[0x21]=0x9
[0x22]=0x0
[0x23]=0x0
[0x24]=0x3
[0x25]=0x3
[0x26]=0x0
[0x27]=0x0
[0x28]=0x21
[0x29]=0x21
[0x2A]=0x14
[0x2B]=0x14
[0x2C]=0x4
[0x2D]=0x4
[0x2E]=0x54
[0x2F]=0x54
[0x30]=0x0
[0x31]=0x0
[0x32]=0x0
[0x33]=0x0
[0x34]=0x0
[0x35]=0x0
[0x36]=0x0
[0x37]=0x0
[0x38]=0x55
[0x39]=0x55
[0x3A]=0x0
pl charging done
No Battery
[0xE]=0x1005
No Battery
[0xE]=0x1005
Over the next few days, I'll try various boot configurations (holding down buttons, poking various test points, using a "factory cable") and look for differences in the console output. I'll summarize those differences when I've finished the work.
NOTE: When I captured this output, it was after having written some bad data to the NVRAM partition. I believe that explains the initial "[Read Test] fail" messages as well as the later complaint "sram(0xC10C983F) sig mismatch".
---------- Post added at 12:38 AM ---------- Previous post was at 12:21 AM ----------
If anyone has a bricked or broken tablet that they'd be willing to part with, please PM me. I'd like to have at least one more device on which to experiment.
I've been poking and prodding my current device quite a bit already, and I think I may have zapped some part of the power-management curcuitry which charges the battery. (Pro tip: remember to unplug the USB cable before applying an alcohol-soaked Q-tip to the board.)
I've already found lots of test points hiding on the motherboard, but it's almost impossible to see where they're going. I'd like to use a hot-air rework station and remove the big chips so I can get to the solder pads.

serial console: no soldering!
In reading threads about other phones and tablets, I somewhere ran across a mention that perhaps the USB port can be used directly as the console. After a bit of experimentation, I got that to work on the Fire.
Code:
TTL USB A/B USB MINI/MICRO
SIGNAL PORT PIN PORT PIN
--------- --------- ---------------
+5V 1 1
RX 2 2
TX 3 3
NC 4
GND 5 4
I verified that this works with three USB/serial chipsets: FT232RL, PL-2302/X, and CP2102.

fully bricked output
Great find noelcragg!
I dumped the output of my fire that I bricked trying to downgrade, through the usb serial port.
Code:
CC¡¨HhU5%Õ‘‘É遂ÂÙ±²…±Õ•…™Ñ•É遺jj¤Ô¨HhU5%Õ‘‘É遂ÂÉÉb²…±Õ•é€‚jj¤Ô¨HhU5%Õ‘‘É遂ÂÉÉb²…±Õ•…™Ñ•É遒jj¤Ô¨HhU5%ÕE‹K—‚ÂÙáb²…±Õ•éÂjj¤Ô¨HhU5%Õ‘‘É遂ÂÙáb²…±Õ•…™Ñ•ÉéÂjj¤Ô¨HhU5%Õ‘‘É遂ÂÙ±²…±Õ•é¢jj¤Ô¨HhU5%Õ‘‘É遂ÂÙ±²…±Õ•…™Ñ•É遢jj¤ü
[USB]addr: 0x11002090 (UART1), value: 0
[USB]addr: 0x11002090 (UART1), value after: 1
Platform initialization is ok
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
wait for frequency meter finish, CLK26CALI = 0x90
mt_pll_post_init: mt_get_bus_freq = 273000Khz
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_mem_freq = 333251Khz
[PWRAP] pwrap_init_preloader
[PWRAP] pwrap_init
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D50
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=1 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=2 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=3 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=8,rdata=5885
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=9,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=10,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
[PWRAP] _pwrap_init_reg_clock
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic6323_init] Preloader Start..................
[pmic6323_init] PMIC CHIP Code = 0x2023
INT_MISC_CON: 1 TOP_RST_MISC: 1
pl pmic powerkey Release
[pmic6323_init] powerKey = 0
[pmic6323_init] is USB in = 0xB003
[pmic6323_init] Reg[0x11A]=0x1B
[pmic6323_init] Done...................
[PLFM] Init I2C: OK(0)
[PLFM] Init PWRAP: OK(0)
[PLFM] Init PMIC: OK(0)
[PLFM] chip[CA00]
[BLDR] Build Time: 20150730-164940
€€€€ €€ € €€ €€ ==== Dump RGU Reg ========
RGU MODE: 55
RGU LENGTH: FFE0
RGU STA: A0000000
RGU INTERVAL: FFF
RGU SWSYSRST: 0
==== Dump RGU Reg End ====
RGU: g_rgu_satus:5
mtk_wdt_mode_config mode value=10, tmp:22000010
PL RGU RST: ??
SW reset with bypass power key flag
Find bypass powerkey flag
mtk_wdt_mode_config mode value=5D, tmp:2200005D
RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
kpd read addr: 0x0040: data:0x4001
Enter mtk_kpd_gpio_set!
kpd debug column : -2147483612, -2147483611, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
after set KP enable: KP_SEL = 0x0 !
MTK_PMIC_RST_KEY is used for this project!
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=3967
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0xD, con = 0x426
[RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2
Writeif_unlock
[RTC] RTC_SPAR0=0x40
rtc_2sec_reboot_check cali=1792
rtc_2sec_stat_clear
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800
[RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
[RTC] bbpu = 0xD, con = 0x426, cali = 0x700
SW reset with bypass power key flag
SW reset with bypass power key flag
[PLFM] WDT reboot bypass power key!
hw_set_cc: 450
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1
[0xF]=0x1
[0x10]=0x0
[0x11]=0x0
[0x12]=0x0
[0x13]=0x0
[0x14]=0x60
[0x15]=0x60
[0x16]=0x0
[0x17]=0x0
[0x18]=0x0
[0x19]=0x0
[0x1A]=0x10
[0x1B]=0x10
[0x1C]=0x0
[0x1D]=0x0
[0x1E]=0x1
[0x1F]=0x1
[0x20]=0x1
[0x21]=0x1
[0x22]=0x0
[0x23]=0x0
[0x24]=0x0
[0x25]=0x0
[0x26]=0x0
[0x27]=0x0
[0x28]=0x21
[0x29]=0x21
[0x2A]=0x14
[0x2B]=0x14
[0x2C]=0x44
[0x2D]=0x44
[0x2E]=0x54
[0x2F]=0x54
[0x30]=0x0
[0x31]=0x0
[0x32]=0x0
[0x33]=0x0
[0x34]=0x0
[0x35]=0x0
[0x36]=0x0
[0x37]=0x0
[0x38]=0x55
[0x39]=0x55
[0x3A]=0x0
hw_set_cc: done
[RTC] Check SW Long Press RST = 0x40
[RTC] rtc_bbpu_power_on done
[SD0] Bus Width: 1
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(193) DS(0) RS(0)
[SD0] Switch to High-Speed mode!
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) DIV(96) DS(0) RS(0)
[SD0] Bus Width: 8
[SD0] Size: 7456 MB, Max.Speed: 52000 kHz, blklen(512), nblks(15269888), ro(0)
[SD0] Initialized
[SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) DIV(0) DS(0) RS(0)
msdc_ett_offline_to_pl: size<2> m_id<0x15>
msdc <0> <HYNIX > <8GND3R>
msdc <1> <xxxxxx> <8GND3R>
msdc failed to find
[EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0
mt_get_dram_type() 0x3
[EMI] LPDDR3
[Check]mt_get_mdl_number 0x0
[EMI] eMMC/NAND ID = 15,1,0,38,47,4E,44,33,52,1,CE,17,4F,F4,B2,51
[EMI] MDL number = 0
[EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
[EMI][Vcore]0x21E=0x48,0x220=0x48
[EMI][Vmem]0x554=0xF
[EMI] LPDDR3 DRAM Clock = 1333 MHz, MEMPLL MODE = 2
[EMI] PCDDR3 RXTDN Calibration:
Start REXTDN SW calibration...
PD 0x1e4[13]:0h
1.INTREF_SEL:0x100[17:16]:0h
2.enable P drive (initial settings),DRAMC_DLLSEL:500F0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:500F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:510F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:520F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:530F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:540F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:550F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:560F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:570F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:580F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:590F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5A0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5B0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5C0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5D0F0h
2.2.CMPOT:0x3dc[31]:80000000h
P drive:13
3.INTREF_SEL:0x100[17:16]:0h
4.enable N drive (initial settings),DRAMC_DLLSEL:3D0FFh
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D0FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D1FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D2FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D3FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D4FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D5FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D6FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D7FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D8FFh
4.2
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[USB]addr: 0x11002090 (UART1), value: 0
[USB]addr: 0x11002090 (UART1), value after: 1
Platform initialization is ok
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
wait for frequency meter finish, CLK26CALI = 0x90
mt_pll_post_init: mt_get_bus_freq = 273000Khz
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_mem_freq = 333251Khz
[PWRAP] pwrap_init_preloader
[PWRAP] pwrap_init
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=1 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=2 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=3 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=9,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=10,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
[PWRAP] _pwrap_init_reg_clock
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic6323_init] Preloader Start..................
[pmic6323_init] PMIC CHIP Code = 0x2023
INT_MISC_CON: 1 TOP_RST_MISC: 1
pl pmic powerkey Release
[pmic6323_init] powerKey = 0
[pmic6323_init] is USB in = 0xB003
[pmic6323_init] Reg[0x11A]=0x1B
[pmic6323_init] Done...................
[PLFM] Init I2C: OK(0)
[PLFM] Init PWRAP: OK(0)
[PLFM] Init PMIC: OK(0)
[PLFM] chip[CA00]
[BLDR] Build Time: 20150730-164940
€€€€ €€ € €€ €€ ==== Dump RGU Reg ========
RGU MODE: 55
RGU LENGTH: FFE0
RGU STA: A0000000
RGU INTERVAL: FFF
RGU SWSYSRST: 0
==== Dump RGU Reg End ====
RGU: g_rgu_satus:5
mtk_wdt_mode_config mode value=10, tmp:22000010
PL RGU RST: ??
SW reset with bypass power key flag
Find bypass powerkey flag
mtk_wdt_mode_config mode value=5D, tmp:2200005D
RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
kpd read addr: 0x0040: data:0x4001
Enter mtk_kpd_gpio_set!
kpd debug column : -2147483612, -2147483611, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
after set KP enable: KP_SEL = 0x0 !
MTK_PMIC_RST_KEY is used for this project!
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=3968
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0xD, con = 0x426
[RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2
Writeif_unlock
[RTC] RTC_SPAR0=0x40
rtc_2sec_reboot_check cali=1792
rtc_2sec_stat_clear
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800
[RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
[RTC] bbpu = 0xD, con = 0x426, cali = 0x700
SW reset with bypass power key flag
SW reset with bypass power key flag
[PLFM] WDT reboot bypass power key!
hw_set_cc: 450
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1
[0xF]=0x1
[0x10]=0x0
[0x11]=0x0
[0x12]=0x0
[0x13]=0x0
[0x14]=0x60
[0x15]=0x60
[0x16]=0x0
[0x17]=0x0
[0x18]=0x0
[0x19]=0x0
[0x1A]=0x10
[0x1B]=0x10
[0x1C]=0x0
[0x1D]=0x0
[0x1E]=0x1
[0x1F]=0x1
[0x20]=0x1
[0x21]=0x1
[0x22]=0x0
[0x23]=0x0
[0x24]=0x0
[0x25]=0x0
[0x26]=0x0
[0x27]=0x0
[0x28]=0x21
[0x29]=0x21
[0x2A]=0x14
[0x2B]=0x14
[0x2C]=0x44
[0x2D]=0x44
[0x2E]=0x54
[0x2F]=0x54
[0x30]=0x0
[0x31]=0x0
[0x32]=0x0
[0x33]=0x0
[0x34]=0x0
[0x35]=0x0
[0x36]=0x0
[0x37]=0x0
[0x38]=0x55
[0x39]=0x55
[0x3A]=0x0
hw_set_cc: done
[RTC] Check SW Long Press RST = 0x40
[RTC] rtc_bbpu_power_on done
[SD0] Bus Width: 1
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(193) DS(0) RS(0)
[SD0] Switch to High-Speed mode!
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) DIV(96) DS(0) RS(0)
[SD0] Bus Width: 8
[SD0] Size: 7456 MB, Max.Speed: 52000 kHz, blklen(512), nblks(15269888), ro(0)
[SD0] Initialized
[SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) DIV(0) DS(0) RS(0)
msdc_ett_offline_to_pl: size<2> m_id<0x15>
msdc <0> <HYNIX > <8GND3R>
msdc <1> <xxxxxx> <8GND3R>
msdc failed to find
[EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0
mt_get_dram_type() 0x3
[EMI] LPDDR3
[Check]mt_get_mdl_number 0x0
[EMI] eMMC/NAND ID = 15,1,0,38,47,4E,44,33,52,1,CE,17,4F,F4,B2,51
[EMI] MDL number = 0
[EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
[EMI][Vcore]0x21E=0x48,0x220=0x48
[EMI][Vmem]0x554=0xF
[EMI] LPDDR3 DRAM Clock = 1333 MHz, MEMPLL MODE = 2
[EMI] PCDDR3 RXTDN Calibration:
Start REXTDN SW calibration...
PD 0x1e4[13]:0h
1.INTREF_SEL:0x100[17:16]:0h
2.enable P drive (initial settings),DRAMC_DLLSEL:500F0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:500F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:510F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:520F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:530F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:540F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:550F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:560F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:570F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:580F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:590F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5A0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5B0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5C0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5D0F0h
2.2.CMPOT:0x3dc[31]:80000000h
P drive:13
3.INTREF_SEL:0x100[17:16]:0h
4.enable N drive (initial settings),DRAMC_DLLSEL:3D0FFh
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D0FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D1FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D2FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D3FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D4FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D5FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D6FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D7FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D8FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D9FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3DAFFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3DBFFh
4.2.CMPOT:0x3dc[31]:0h
N drive:10
drvp=0xD,drvn=0xA
=============================================
X-axis: DQS Gating Window Delay (Fine Scale)
Y-axis: DQS Gating Window Delay (Coarse Scale)
=============================================
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
0013:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
0014:| 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0
0015:| 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Rank 12 coarse tune value selection : 32,
20
56
rank 0 coarse = 20
rank 0 fine = 56
00:| 0 0 0 0 1 1 1 0
opt_dle value:9
[EMI]warning:rank auto detect:==single rank==
Change CMD/ADDR output delay = 15
Change CLK output delay = 15
20
64
Change CMD/ADDR output delay = 14
Change CLK output delay = 14
20
64
Change CMD/ADDR output delay = 0
Change CLK output delay = 0
20
48
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
byte:2, (DQS,DQ)=(8,7)
byte:3, (DQS,DQ)=(8,8)
[EMI] DRAMC calibration passed
[MEM] complex R/W mem test pass
0:dram_rank_size:40000000
[Dram_Buffer] dram size:1073741824
[Dram_Buffer] structure size: 1557624
[Dram_Buffer] MAX_TEE_DRAM_SIZE: 268435456
E~ sram(0x25007E45) sig mismatch
RAM_CONSOLE start: 0x83F00000, size: 0x4000
RAM_CONSOLE preloader last status: 0x0 0x0 0x0
RAM_CONSOLE wdt status (0x5)=0x5
[PLFM] Init Boot Device: OK(0)
Enter mtk_kpd_gpio_set!
kpd debug column : -2147483612, -2147483611, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
[PART] GPT dump
[PART] 1: 00000800 00000800 'KB'
[PART] 2: 00000800 00001000 'DKB'
[PART] 3: 00008B00 00001800 'EXPDB'
[PART] 4: 00000800 0000A300 'UBOOT'
[PART] 5: 00008000 0000AB00 'boot'
[PART] 6: 00008000 00012B00 'recovery'
[PART] 7: 00000400 0001AB00 'MISC'
[PART] 8: 00001C00 0001AF00 'LOGO'
[PART] 9: 00002800 0001CB00 'TEE1'
[PART] 10: 00002800 0001F300 'TEE2'
[PART] 11: 00258000 00021B00 'system'
[PART] 12: 0007D000 00279B00 'cache'
[PART] 13: 00B994DF 002F6B00 'userdata'
[LIB] HW ENC
[platform_vusb_on] PASS
hw_set_cc: 450
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1
[0xF]=0x1
[0x10]=0x0
[0x11]=0x0
[0x
[SECURITY]: Production device
[PART] This is a production device.
[PART] Verifying LK...
[VERIFY_LK] Succeed to pass the LK verification.
[PART] load "3" from 0x0000000001460200 (dev) to 0x81E00000 (mem) [SUCCESS]
[PART] load speed: 2917KB/s, 406452 bytes, 136ms
0:dram_rank_size:40000000
DRAM size is 0x40000000
[PART] Image with part header
[PART] name : TEE
[PART] addr : FFFFFFFFh mode : -1
[PART] size : 1063936
[PART] magic: 58881688h
[PART] load "8" from 0x0000000003960200 (dev) to 0xBFF00000 (mem) [SUCCESS]
[PART] load speed: 79922KB/s, 1063936 bytes, 13ms
[PART] Image with part header
[PART] name : TEE
[PART] addr : FFFFFFFFh mode : -1
[PART] size : 1063936
[PART] magic: 58881688h
[PART] load "8" from 0x0000000003960200 (dev) to 0xB8A00000 (mem) [SUCCESS]
[PART] load speed: 74213KB/s, 1063936 bytes, 14ms
[BLMTEE] sha256 takes 6 (ms) for 1063360 bytes
[BLMTEE] rsa2048 takes 118 (ms)
[BLMTEE] verify pkcs#1 pss: 0 (ms)
[BLMTEE] aes128cbc 8 (ms) for 1063360
[ANTI-ROLLBACK] Processing anti-rollback data
mmc_rpmb_send_command -> req_type=0x1, type=0x4, blks=0x1
mmc_rpmb_send_command -> req_type=0x2, type=0x4, blks=0x1
[ANTI-ROLLBACK] PL: 2 TEE: 3002 LK: 3
[ANTI-ROLLBACK] Checksum validated
[ANTI-ROLLBACK] LK version mismatch!
[ANTI-ROLLBACK] L: 3 R: 2

picture of usb-serial connected to micro usb plug
For those who are more visually-oriented, I've attached a picture showing the attachment of a FT232RL USB-to-TTL-Serial adapter to a 5-pin micro USB plug.

flaming_goat said:
Great find noelcragg!
I dumped the output of my fire that I bricked trying to downgrade, through the usb serial port.
Code:
CC¡¨HhU5%Õ‘‘É遂ÂÙ±²…±Õ•…™Ñ•É遺jj¤Ô¨HhU5%Õ‘‘É遂ÂÉÉb²…±Õ•é€‚jj¤Ô¨HhU5%Õ‘‘É遂ÂÉÉb²…±Õ•…™Ñ•É遒jj¤Ô¨HhU5%ÕE‹K—‚ÂÙáb²…±Õ•éÂjj¤Ô¨HhU5%Õ‘‘É遂ÂÙáb²…±Õ•…™Ñ•ÉéÂjj¤Ô¨HhU5%Õ‘‘É遂ÂÙ±²…±Õ•é¢jj¤Ô¨HhU5%Õ‘‘É遂ÂÙ±²…±Õ•…™Ñ•É遢jj¤ü
[USB]addr: 0x11002090 (UART1), value: 0
[USB]addr: 0x11002090 (UART1), value after: 1
Platform initialization is ok
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
wait for frequency meter finish, CLK26CALI = 0x90
mt_pll_post_init: mt_get_bus_freq = 273000Khz
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_mem_freq = 333251Khz
[PWRAP] pwrap_init_preloader
[PWRAP] pwrap_init
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D50
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=1 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=2 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=3 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=8,rdata=5885
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=9,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=10,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
[PWRAP] _pwrap_init_reg_clock
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic6323_init] Preloader Start..................
[pmic6323_init] PMIC CHIP Code = 0x2023
INT_MISC_CON: 1 TOP_RST_MISC: 1
pl pmic powerkey Release
[pmic6323_init] powerKey = 0
[pmic6323_init] is USB in = 0xB003
[pmic6323_init] Reg[0x11A]=0x1B
[pmic6323_init] Done...................
[PLFM] Init I2C: OK(0)
[PLFM] Init PWRAP: OK(0)
[PLFM] Init PMIC: OK(0)
[PLFM] chip[CA00]
[BLDR] Build Time: 20150730-164940
€€€€ €€ € €€ €€ ==== Dump RGU Reg ========
RGU MODE: 55
RGU LENGTH: FFE0
RGU STA: A0000000
RGU INTERVAL: FFF
RGU SWSYSRST: 0
==== Dump RGU Reg End ====
RGU: g_rgu_satus:5
mtk_wdt_mode_config mode value=10, tmp:22000010
PL RGU RST: ??
SW reset with bypass power key flag
Find bypass powerkey flag
mtk_wdt_mode_config mode value=5D, tmp:2200005D
RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
kpd read addr: 0x0040: data:0x4001
Enter mtk_kpd_gpio_set!
kpd debug column : -2147483612, -2147483611, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
after set KP enable: KP_SEL = 0x0 !
MTK_PMIC_RST_KEY is used for this project!
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=3967
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0xD, con = 0x426
[RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2
Writeif_unlock
[RTC] RTC_SPAR0=0x40
rtc_2sec_reboot_check cali=1792
rtc_2sec_stat_clear
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800
[RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
[RTC] bbpu = 0xD, con = 0x426, cali = 0x700
SW reset with bypass power key flag
SW reset with bypass power key flag
[PLFM] WDT reboot bypass power key!
hw_set_cc: 450
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1
[0xF]=0x1
[0x10]=0x0
[0x11]=0x0
[0x12]=0x0
[0x13]=0x0
[0x14]=0x60
[0x15]=0x60
[0x16]=0x0
[0x17]=0x0
[0x18]=0x0
[0x19]=0x0
[0x1A]=0x10
[0x1B]=0x10
[0x1C]=0x0
[0x1D]=0x0
[0x1E]=0x1
[0x1F]=0x1
[0x20]=0x1
[0x21]=0x1
[0x22]=0x0
[0x23]=0x0
[0x24]=0x0
[0x25]=0x0
[0x26]=0x0
[0x27]=0x0
[0x28]=0x21
[0x29]=0x21
[0x2A]=0x14
[0x2B]=0x14
[0x2C]=0x44
[0x2D]=0x44
[0x2E]=0x54
[0x2F]=0x54
[0x30]=0x0
[0x31]=0x0
[0x32]=0x0
[0x33]=0x0
[0x34]=0x0
[0x35]=0x0
[0x36]=0x0
[0x37]=0x0
[0x38]=0x55
[0x39]=0x55
[0x3A]=0x0
hw_set_cc: done
[RTC] Check SW Long Press RST = 0x40
[RTC] rtc_bbpu_power_on done
[SD0] Bus Width: 1
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(193) DS(0) RS(0)
[SD0] Switch to High-Speed mode!
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) DIV(96) DS(0) RS(0)
[SD0] Bus Width: 8
[SD0] Size: 7456 MB, Max.Speed: 52000 kHz, blklen(512), nblks(15269888), ro(0)
[SD0] Initialized
[SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) DIV(0) DS(0) RS(0)
msdc_ett_offline_to_pl: size<2> m_id<0x15>
msdc <0> <HYNIX > <8GND3R>
msdc <1> <xxxxxx> <8GND3R>
msdc failed to find
[EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0
mt_get_dram_type() 0x3
[EMI] LPDDR3
[Check]mt_get_mdl_number 0x0
[EMI] eMMC/NAND ID = 15,1,0,38,47,4E,44,33,52,1,CE,17,4F,F4,B2,51
[EMI] MDL number = 0
[EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
[EMI][Vcore]0x21E=0x48,0x220=0x48
[EMI][Vmem]0x554=0xF
[EMI] LPDDR3 DRAM Clock = 1333 MHz, MEMPLL MODE = 2
[EMI] PCDDR3 RXTDN Calibration:
Start REXTDN SW calibration...
PD 0x1e4[13]:0h
1.INTREF_SEL:0x100[17:16]:0h
2.enable P drive (initial settings),DRAMC_DLLSEL:500F0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:500F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:510F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:520F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:530F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:540F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:550F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:560F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:570F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:580F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:590F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5A0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5B0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5C0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5D0F0h
2.2.CMPOT:0x3dc[31]:80000000h
P drive:13
3.INTREF_SEL:0x100[17:16]:0h
4.enable N drive (initial settings),DRAMC_DLLSEL:3D0FFh
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D0FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D1FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D2FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D3FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D4FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D5FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D6FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D7FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D8FFh
4.2
CC¡¨HhU5%Õ‘‘É遂ÂÙ±²…±Õ•…™Ñ•É遺jj¤Ô¨HhU5%ÕE‹K—‚ÂÉÉb²…±Õ•é‚jj¤Ô¨HhU5%Õ‘‘É遂ÂÉÉb²…±Õ•…™Ñ•É遒jh¤Ô¨HhU5%Õ‘‘É遂ÂÙáb²…±Õ•éÂjj¤Ô¨HhU5%Õ‘‘É遂ÂÙáb²…±Õ•…™Ñ•ÉéÂjj¤Ô¨HhU5%Õ‘‘É遂ÂÙ±²…±Õ•é¢jj¤Ô¨HhU5%Õ‘‘É遂ÂÙ±²…±Õ•„™Ñ•É遢jj¤ü
[USB]addr: 0x11002090 (UART1), value: 0
[USB]addr: 0x11002090 (UART1), value after: 1
Platform initialization is ok
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
wait for frequency meter finish, CLK26CALI = 0x90
mt_pll_post_init: mt_get_bus_freq = 273000Khz
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_mem_freq = 333251Khz
[PWRAP] pwrap_init_preloader
[PWRAP] pwrap_init
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=1 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=2 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=3 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=9,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=10,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
[PWRAP] _pwrap_init_reg_clock
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic6323_init] Preloader Start..................
[pmic6323_init] PMIC CHIP Code = 0x2023
INT_MISC_CON: 1 TOP_RST_MISC: 1
pl pmic powerkey Release
[pmic6323_init] powerKey = 0
[pmic6323_init] is USB in = 0xB003
[pmic6323_init] Reg[0x11A]=0x1B
[pmic6323_init] Done...................
[PLFM] Init I2C: OK(0)
[PLFM] Init PWRAP: OK(0)
[PLFM] Init PMIC: OK(0)
[PLFM] chip[CA00]
[BLDR] Build Time: 20150730-164940
€€€€ €€ € €€ €€ ==== Dump RGU Reg ========
RGU MODE: 55
RGU LENGTH: FFE0
RGU STA: A0000000
RGU INTERVAL: FFF
RGU SWSYSRST: 0
==== Dump RGU Reg End ====
RGU: g_rgu_satus:5
mtk_wdt_mode_config mode value=10, tmp:22000010
PL RGU RST: ??
SW reset with bypass power key flag
Find bypass powerkey flag
mtk_wdt_mode_config mode value=5D, tmp:2200005D
RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
kpd read addr: 0x0040: data:0x4001
Enter mtk_kpd_gpio_set!
kpd debug column : -2147483612, -2147483611, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
after set KP enable: KP_SEL = 0x0 !
MTK_PMIC_RST_KEY is used for this project!
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=3968
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0xD, con = 0x426
[RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2
Writeif_unlock
[RTC] RTC_SPAR0=0x40
rtc_2sec_reboot_check cali=1792
rtc_2sec_stat_clear
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800
[RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
[RTC] bbpu = 0xD, con = 0x426, cali = 0x700
SW reset with bypass power key flag
SW reset with bypass power key flag
[PLFM] WDT reboot bypass power key!
hw_set_cc: 450
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1
[0xF]=0x1
[0x10]=0x0
[0x11]=0x0
[0x12]=0x0
[0x13]=0x0
[0x14]=0x60
[0x15]=0x60
[0x16]=0x0
[0x17]=0x0
[0x18]=0x0
[0x19]=0x0
[0x1A]=0x10
[0x1B]=0x10
[0x1C]=0x0
[0x1D]=0x0
[0x1E]=0x1
[0x1F]=0x1
[0x20]=0x1
[0x21]=0x1
[0x22]=0x0
[0x23]=0x0
[0x24]=0x0
[0x25]=0x0
[0x26]=0x0
[0x27]=0x0
[0x28]=0x21
[0x29]=0x21
[0x2A]=0x14
[0x2B]=0x14
[0x2C]=0x44
[0x2D]=0x44
[0x2E]=0x54
[0x2F]=0x54
[0x30]=0x0
[0x31]=0x0
[0x32]=0x0
[0x33]=0x0
[0x34]=0x0
[0x35]=0x0
[0x36]=0x0
[0x37]=0x0
[0x38]=0x55
[0x39]=0x55
[0x3A]=0x0
hw_set_cc: done
[RTC] Check SW Long Press RST = 0x40
[RTC] rtc_bbpu_power_on done
[SD0] Bus Width: 1
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) DIV(193) DS(0) RS(0)
[SD0] Switch to High-Speed mode!
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) DIV(96) DS(0) RS(0)
[SD0] Bus Width: 8
[SD0] Size: 7456 MB, Max.Speed: 52000 kHz, blklen(512), nblks(15269888), ro(0)
[SD0] Initialized
[SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) DIV(0) DS(0) RS(0)
msdc_ett_offline_to_pl: size<2> m_id<0x15>
msdc <0> <HYNIX > <8GND3R>
msdc <1> <xxxxxx> <8GND3R>
msdc failed to find
[EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0
mt_get_dram_type() 0x3
[EMI] LPDDR3
[Check]mt_get_mdl_number 0x0
[EMI] eMMC/NAND ID = 15,1,0,38,47,4E,44,33,52,1,CE,17,4F,F4,B2,51
[EMI] MDL number = 0
[EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
[EMI][Vcore]0x21E=0x48,0x220=0x48
[EMI][Vmem]0x554=0xF
[EMI] LPDDR3 DRAM Clock = 1333 MHz, MEMPLL MODE = 2
[EMI] PCDDR3 RXTDN Calibration:
Start REXTDN SW calibration...
PD 0x1e4[13]:0h
1.INTREF_SEL:0x100[17:16]:0h
2.enable P drive (initial settings),DRAMC_DLLSEL:500F0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:500F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:510F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:520F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:530F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:540F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:550F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:560F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:570F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:580F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:590F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5A0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5B0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5C0F0h
2.2.CMPOT:0x3dc[31]:0h
2.1.DRAMC_DLLSEL, CMPDRVP 0x0c0[15:12]:5D0F0h
2.2.CMPOT:0x3dc[31]:80000000h
P drive:13
3.INTREF_SEL:0x100[17:16]:0h
4.enable N drive (initial settings),DRAMC_DLLSEL:3D0FFh
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D0FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D1FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D2FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D3FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D4FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D5FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D6FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D7FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D8FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3D9FFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3DAFFh
4.2.CMPOT:0x3dc[31]:80000000h
4.1.DRAMC_DLLSEL, CMPDRVN 0x0c0[11:8]:3DBFFh
4.2.CMPOT:0x3dc[31]:0h
N drive:10
drvp=0xD,drvn=0xA
=============================================
X-axis: DQS Gating Window Delay (Fine Scale)
Y-axis: DQS Gating Window Delay (Coarse Scale)
=============================================
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
0013:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
0014:| 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0
0015:| 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Rank 12 coarse tune value selection : 32,
20
56
rank 0 coarse = 20
rank 0 fine = 56
00:| 0 0 0 0 1 1 1 0
opt_dle value:9
[EMI]warning:rank auto detect:==single rank==
Change CMD/ADDR output delay = 15
Change CLK output delay = 15
20
64
Change CMD/ADDR output delay = 14
Change CLK output delay = 14
20
64
Change CMD/ADDR output delay = 0
Change CLK output delay = 0
20
48
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
byte:2, (DQS,DQ)=(8,7)
byte:3, (DQS,DQ)=(8,8)
[EMI] DRAMC calibration passed
[MEM] complex R/W mem test pass
0:dram_rank_size:40000000
[Dram_Buffer] dram size:1073741824
[Dram_Buffer] structure size: 1557624
[Dram_Buffer] MAX_TEE_DRAM_SIZE: 268435456
E~ sram(0x25007E45) sig mismatch
RAM_CONSOLE start: 0x83F00000, size: 0x4000
RAM_CONSOLE preloader last status: 0x0 0x0 0x0
RAM_CONSOLE wdt status (0x5)=0x5
[PLFM] Init Boot Device: OK(0)
Enter mtk_kpd_gpio_set!
kpd debug column : -2147483612, -2147483611, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
[PART] GPT dump
[PART] 1: 00000800 00000800 'KB'
[PART] 2: 00000800 00001000 'DKB'
[PART] 3: 00008B00 00001800 'EXPDB'
[PART] 4: 00000800 0000A300 'UBOOT'
[PART] 5: 00008000 0000AB00 'boot'
[PART] 6: 00008000 00012B00 'recovery'
[PART] 7: 00000400 0001AB00 'MISC'
[PART] 8: 00001C00 0001AF00 'LOGO'
[PART] 9: 00002800 0001CB00 'TEE1'
[PART] 10: 00002800 0001F300 'TEE2'
[PART] 11: 00258000 00021B00 'system'
[PART] 12: 0007D000 00279B00 'cache'
[PART] 13: 00B994DF 002F6B00 'userdata'
[LIB] HW ENC
[platform_vusb_on] PASS
hw_set_cc: 450
[0x0]=0x7B
[0x1]=0x7B
[0x2]=0xB2
[0x3]=0xB2
[0x4]=0x8C
[0x5]=0x8C
[0x6]=0x1F
[0x7]=0x1F
[0x8]=0xC
[0x9]=0xC
[0xA]=0x0
[0xB]=0x0
[0xC]=0x1
[0xD]=0x1
[0xE]=0x1
[0xF]=0x1
[0x10]=0x0
[0x11]=0x0
[0x
[SECURITY]: Production device
[PART] This is a production device.
[PART] Verifying LK...
[VERIFY_LK] Succeed to pass the LK verification.
[PART] load "3" from 0x0000000001460200 (dev) to 0x81E00000 (mem) [SUCCESS]
[PART] load speed: 2917KB/s, 406452 bytes, 136ms
0:dram_rank_size:40000000
DRAM size is 0x40000000
[PART] Image with part header
[PART] name : TEE
[PART] addr : FFFFFFFFh mode : -1
[PART] size : 1063936
[PART] magic: 58881688h
[PART] load "8" from 0x0000000003960200 (dev) to 0xBFF00000 (mem) [SUCCESS]
[PART] load speed: 79922KB/s, 1063936 bytes, 13ms
[PART] Image with part header
[PART] name : TEE
[PART] addr : FFFFFFFFh mode : -1
[PART] size : 1063936
[PART] magic: 58881688h
[PART] load "8" from 0x0000000003960200 (dev) to 0xB8A00000 (mem) [SUCCESS]
[PART] load speed: 74213KB/s, 1063936 bytes, 14ms
[BLMTEE] sha256 takes 6 (ms) for 1063360 bytes
[BLMTEE] rsa2048 takes 118 (ms)
[BLMTEE] verify pkcs#1 pss: 0 (ms)
[BLMTEE] aes128cbc 8 (ms) for 1063360
[ANTI-ROLLBACK] Processing anti-rollback data
mmc_rpmb_send_command -> req_type=0x1, type=0x4, blks=0x1
mmc_rpmb_send_command -> req_type=0x2, type=0x4, blks=0x1
[ANTI-ROLLBACK] PL: 2 TEE: 3002 LK: 3
[ANTI-ROLLBACK] Checksum validated
[ANTI-ROLLBACK] LK version mismatch!
[ANTI-ROLLBACK] L: 3 R: 2
Click to expand...
Click to collapse
anti rollback is the problem with that brick like we all figured but still cool to see it in the output

Is it a lost cause at this point?
Sent from my LG-E980 using XDA-Developers mobile app

Related

Error: Unable to create /dev/dun

Hi dev's and friends,
i need some help:
just trying to get CAF (CodeAurora) Gingerbread 2.3.4 running, but i cant
solve a QCRIL problem: i use the new baseband for P500 - rild is starting,
libs are loading but i see a error in logcat as described in thread title.
my questions:
1.) what does it mean
2.) rild and qmuxd services are running as radio:radio, needs this another user as in LG ginger?
Thanks for hints, tips, help and a virtual beer
Can you send me whole logcat to PM. Maybe I can help you.
Sent from my LG-P500 using XDA Premium App
It's trying to create the device DialUpNetworking, my first impression is same like yours, the userrights are wrong.
I remember there was a file for userpermissions, will try to find it for you next thing in the morning.
Yeah,give some other infos I can help you since I have a working computer now and I know RIL stuff
(try using LGE proprietary files though if you didn't )
thanks for answering,
i think i have another problem but /dev/dun:
today i flashed back my GB2.3.4 CM7 rom, applied the new QRIL libs
and binaries (rild,qmuxd,rmt-storage) ... but ... i dont have GSM network.
might be, something is wrong with my baseband???
i flashed the baseband as described here (the russian way):
http://forum.xda-developers.com/showthread.php?t=1149530
the official LG rom is working, but no cooked rom
andy572 said:
thanks for answering,
i think i have another problem but /dev/dun:
today i flashed back my GB2.3.4 CM7 rom, applied the new QRIL libs
and binaries (rild,qmuxd,rmt-storage) ... but ... i dont have GSM network.
might be, something is wrong with my baseband???
i flashed the baseband as described here (the russian way):
http://forum.xda-developers.com/showthread.php?t=1149530
the official LG rom is working, but no cooked rom
Click to expand...
Click to collapse
Maybe you forgot rild binary
(btw you can see if in logcat you find something like can't comunicate with qualcomm radio MSM7227. I had this problem on Sense when GSM wasn't working,but that's another story,sorry,there I had to use libhtc_ril.so).
as i wrote, i really have all ril libs and binaries copied to he rom ...
ril is starting and some later it comes a message from gstk, but i cant read this - the messages are very fast looping
andy572 said:
as i wrote, i really have all ril libs and binaries copied to the rom ...
ril is starting and some later it comes a message from gstk, but i cant read this - the messages are very fast looping
Click to expand...
Click to collapse
Sorry
(why don't you..uh...CTRL-C the terminal)?
ok, here is some logcat:
Code:
D/QCRIL ( 1464): UI <--- RIL_UNSOL_RESPONSE_RADIO_STATE_CHANGED (1000) --- RIL [RID 0, Len 0, (null)]
D/QCRIL ( 1464): RID 0 currentState() -> Radio On(2)
D/QCRIL ( 1464): RIL --- CM_DISABLE_SUBSCRIPTION(94211), RID 0, MID 0 ---> RIL
D/QCRIL ( 1464): RID 0 MID 0 Disable Pri GW subscription
D/DATA (11529): [DSST(0)] pollstate() : reason = radio state changed
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/QCRIL ( 1464): qcril_event_main(): 1 items on queue
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/QCRIL ( 1464): Pri GW subscription disabled
D/QCRIL ( 1464): UI --- RIL_REQUEST_DATA_REGISTRATION_STATE (21) ---> RIL [RID 0, token id 15, data len 0]
D/QCRIL ( 1464): RID 0 data tech: gwl modem id=0, pdt modem id=1, pdt=Unknown(0), ma=Multimode(0), net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): Current System : srv status 0, sys mode 0, roam status 0, srv domain 0, srv cap 3, IDM 0, hybrid 0, hdr srv status 0 managed roaming 0, mode pref 19
D/QCRIL ( 1464): NO SERVICE
D/QCRIL ( 1464): Reject cause value sent to UI = 0
D/QCRIL ( 1464): CS only System : srv status 0, srv capability 3
D/QCRIL ( 1464): Registration State: Not registered/Actively searching, RadioTech: Unknown, LAC: (null), CID: (null), BSID: (null), BSLat: (null), BSLong: (null)
D/QCRIL ( 1464): CCS: (null), SID: (null), NID: (null), RoamStatus: (null), PRL: (null), DefRoamStatus: (null), RejReason: 0
D/QCRIL ( 1464): UI <--- RIL_REQUEST_DATA_REGISTRATION_STATE (21) Complete --- RIL [RID 0, Token 15, Success, Len 24 Not registered/Actively searching]
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
D/QCRIL ( 1464): UI --- RIL_REQUEST_OPERATOR (22) ---> RIL [RID 0, token id 16, data len 0]
D/QCRIL ( 1464): RID 0 voice srv: modem id=0, ma=Multimode(0), net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): Reply to RIL --> Current operator full name :
D/QCRIL ( 1464): Reply to RIL --> Current operator short name :
D/QCRIL ( 1464): Reply to RIL --> Current operator MCCMNC :
D/QCRIL ( 1464): UI <--- RIL_REQUEST_OPERATOR (22) Complete --- RIL [RID 0, Token 16, Success, Len 12 ]
D/QCRIL ( 1464): UI --- RIL_REQUEST_REGISTRATION_STATE (20) ---> RIL [RID 0, token id 17, data len 0]
D/QCRIL ( 1464): RID 0 voice tech: gw modem id=0, ma=Multimode(0), net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): Current System : srv status 0, sys mode 0, roam status 0, srv domain 0, srv cap 3, IDM 0, hybrid 0, hdr srv status 0 managed roaming 0, mode pref 19
D/QCRIL ( 1464): NO SERVICE
D/QCRIL ( 1464): Reject cause value sent to UI = 0
D/QCRIL ( 1464): CS only System : srv status 0, srv capability 3
D/QCRIL ( 1464): Registration State: Not registered/Actively searching, RadioTech: Unknown, LAC: (null), CID: (null), BSID: (null), BSLat: (null), BSLong: (null)
D/QCRIL ( 1464): CCS: (null), SID: (null), NID: (null), RoamStatus: (null), PRL: (null), DefRoamStatus: (null), RejReason: 0
D/QCRIL ( 1464): UI <--- RIL_REQUEST_REGISTRATION_STATE (20) Complete --- RIL [RID 0, Token 17, Success, Len 60 Not registered/Actively searching]
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
D/QCRIL ( 1464): UI --- RIL_REQUEST_QUERY_NETWORK_SELECTION_MODE (45) ---> RIL [RID 0, token id 18, data len 0]
D/QCRIL ( 1464): RID 0 ph srv 3GPP(1): modem id=0, ma=Multimode(0), net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): [RID 0] ReqList entries :
D/QCRIL ( 1464): RIL_REQUEST_RADIO_POWER (23), token id 8
D/QCRIL ( 1464): RIL_REQUEST_QUERY_NETWORK_SELECTION_MODE (45), token id 18
D/QCRIL ( 1464): UI --- RIL_REQUEST_VOICE_RADIO_TECH (105) ---> RIL [RID 0, token id 19, data len 0]
D/QCRIL ( 1464): RID 0 voice srv: modem id=0, ma=Multimode(0), net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): Reply to RIL --> voice tech 3GPP
D/QCRIL ( 1464): UI <--- RIL_REQUEST_VOICE_RADIO_TECH (105) Complete --- RIL [RID 0, Token 19, Success, Len 4 ]
D/QCRIL ( 1464): RID 0 MID 0 Received phonesvc event : CM_PH_EVENT_PRL_INIT (69670)
D/QCRIL ( 1464): RID 0 MID 0 Queued event CM_PH_EVENT_PRL_INIT (5536 bytes)
D/QCRIL ( 1464): qcril_event_main(): 1 items on queue
D/QCRIL ( 1464): RID 0 MID 0 De-queued event CM_PH_EVENT_PRL_INIT (69670)
D/QCRIL ( 1464): RIL <--- CM_PH_EVENT_PRL_INIT(69670), RID 0, MID 0 --- AMSS
D/QCRIL ( 1464): MID 0 prl_pref_only=0, prl_id=8888
D/QCRIL ( 1464): prl_pref_only is FALSE - Checking HOME_SID_NID
D/QCRIL ( 1464): UI --- RIL_REQUEST_GET_CDMA_SUBSCRIPTION_SOURCE (104) ---> RIL [RID 0, token id 20, data len 0]
D/QCRIL ( 1464): RID 0 ph srv Common(2): modem id=0, ma=Multimode(0), net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): RID 0, ma=Multimode(0), restored=1, query net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): UI <--- RIL_REQUEST_GET_CDMA_SUBSCRIPTION_SOURCE (104) Complete --- RIL [RID 0, Token 20, Generic Failure, Len 0 ]
D/QCRIL ( 1464): RID 0 MID 0 Received CM_PH_COMMAND_CALLBACK : Req ID 5087
D/QCRIL ( 1464): RID 0 MID 0 Queued event CM_COMMAND_CALLBACK (12 bytes)
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
D/QCRIL ( 1464): RID 0 MID 0 Received phonesvc event : CM_PH_EVENT_INFO (69644)
D/QCRIL ( 1464): RID 0 MID 0 Queued event CM_PH_EVENT_INFO (5536 bytes)
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/QCRIL ( 1464): qcril_event_main(): 2 items on queue
D/QCRIL ( 1464): RID 0 MID 0 De-queued event CM_COMMAND_CALLBACK (65537)
D/QCRIL ( 1464): RIL <--- CM_COMMAND_CALLBACK(65537), RID 0, MID 0 --- AMSS
D/QCRIL ( 1464): Change the state of ReqList entry to AWAITING_MORE_AMSS_EVENTS state : RIL_REQUEST_QUERY_NETWORK_SELECTION_MODE (45), Token ID 18, pending CM_PH_EVENT_INFO (69644)
D/QCRIL ( 1464): RID 0 MID 0 De-queued event CM_PH_EVENT_INFO (69644)
D/QCRIL ( 1464): RIL <--- CM_PH_EVENT_INFO(69644), RID 0, MID 0 --- AMSS
D/QCRIL ( 1464): MID 0 oprt_mode=5, rtre_control=2, rtre_config=2, prl_pref_only=0, prl_id=8888
D/QCRIL ( 1464): RID 0 MID 0 SIM subscription source
D/QCRIL ( 1464): RID 0 MID 0 Pri GW subscription disabled
D/QCRIL ( 1464): RID 0 MID 0 Pri CDMA subscription disabled
D/QCRIL ( 1464): RID 0 MID: 0, Prev Oprt mode: 5, Oprt mode: 5, Mode pref: 19, GW acq order: 2, Band pref: -1073741825, Roam pref: 255, Network sel mode: 0, plmn[0]=255, plmn[1]=255, plmn[2]=255, rtre control: 2
D/QCRIL ( 1464): RID 0 MID 0 Mode capability: 40
D/QCRIL ( 1464): Reply to RIL --> Automatic network selection mode
D/QCRIL ( 1464): [RID 0] ReqList entries :
D/QCRIL ( 1464): RIL_REQUEST_RADIO_POWER (23), token id 8
D/QCRIL ( 1464): UI <--- RIL_REQUEST_QUERY_NETWORK_SELECTION_MODE (45) Complete --- RIL [RID 0, Token 18, Success, Len 4 Automatic]
D/QCRIL ( 1464): [CM_PH_EVENT_INFO(69644)] Modem: On --> On, Voice Tech: 3GPP --> 3GPP
D/QCRIL ( 1464): [CM_PH_EVENT_INFO(69644)] GW SIM(pri): Not ready --> Not ready, CDMA SIM(pri): Not ready --> Not ready, GW SIM(sec): Not ready --> Not ready, CDMA SIM(sec): Not ready --> Not ready
D/QCRIL ( 1464): [CM_PH_EVENT_INFO(69644)] Subscription: 0x8 --> 0x8
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/QCRIL ( 1464): RID 0 MID 0 Queued event MMGSDI_EVENT_CALLBACK (1320 bytes)
D/QCRIL ( 1464): qcril_event_main(): 1 items on queue
D/QCRIL ( 1464): RID 0 MID 0 De-queued event MMGSDI_EVENT_CALLBACK (196610)
D/QCRIL ( 1464): RIL <--- MMGSDI_EVENT_CALLBACK(196610), RID 0, MID 0 --- AMSS
D/QCRIL ( 1464): MMGSDI_REFRESH_EVT
D/QCRIL ( 1464): Card Status
D/QCRIL ( 1464): -Card_State: RIL_CARDSTATE_PRESENT
D/QCRIL ( 1464): -Universal Pin State: RIL_PINSTATE_UNKNOWN
D/QCRIL ( 1464): Number of 3GPP App Indexes: 0x1
D/QCRIL ( 1464): -App Type: RIL_APPTYPE_USIM
D/QCRIL ( 1464): -App State: RIL_APPSTATE_DETECTED
D/QCRIL ( 1464): -Perso SubState: RIL_PERSOSUBSTATE_UNKNOWN
D/QCRIL ( 1464): -Aid: a0000000871002ff49ffff89
D/QCRIL ( 1464): -Label: 452d506c7573205553494d
D/QCRIL ( 1464): -pin1_replaced: Not Replaced by UPin
D/QCRIL ( 1464): -Pin1 State: RIL_PINSTATE_UNKNOWN
D/QCRIL ( 1464): -Pin2 State: RIL_PINSTATE_UNKNOWN
D/QCRIL ( 1464): Invalid num_current_3gpp2_indexes: 0
D/QCRIL ( 1464): Total number of Card Applications: 0x1
D/QCRIL ( 1464): -App Type: RIL_APPTYPE_USIM
D/QCRIL ( 1464): -App State: RIL_APPSTATE_DETECTED
D/QCRIL ( 1464): -Pin1 State: RIL_PINSTATE_UNKNOWN
D/QCRIL ( 1464): -Pin2 State: RIL_PINSTATE_UNKNOWN
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/QCRIL ( 1464): UI --- RIL_REQUEST_GET_CURRENT_CALLS (9) ---> RIL [RID 0, token id 21, data len 0]
D/QCRIL ( 1464): Reply to RIL --> Number of calls : 0
D/QCRIL ( 1464): UI <--- RIL_REQUEST_GET_CURRENT_CALLS (9) Complete --- RIL [RID 0, Token 21, Success, Len 0 ]
D/QCRIL ( 1464): RID 0 MID 0 Received phonesvc event : CM_PH_EVENT_SYS_SEL_PREF (69634)
D/QCRIL ( 1464): RID 0 MID 0 Queued event CM_PH_EVENT_SYS_SEL_PREF (5536 bytes)
D/QCRIL ( 1464): qcril_event_main(): 1 items on queue
D/QCRIL ( 1464): RID 0 MID 0 De-queued event CM_PH_EVENT_SYS_SEL_PREF (69634)
D/QCRIL ( 1464): RIL <--- CM_PH_EVENT_SYS_SEL_PREF(69634), RID 0, MID 0 --- AMSS
D/QCRIL ( 1464): RID 0 MID 0, Mode: 19, GW acq order: 2, Band pref: -1073741825, Roam pref: 255, Network sel mode: 0, plmn[0]=255, plmn[1]=255, plmn[2]=255
D/QCRIL ( 1464): RID 0 MID 0 Ph_state: 0
D/QCRIL ( 1464): RID 0 MID 0 Mode capability: 40
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
D/QCRIL ( 1464): UI --- RIL_REQUEST_IMS_REGISTRATION_STATE (106) ---> RIL [RID 0, token id 22, data len 0]
E/QCRIL ( 1464): RID 0 sms srv IMS Reg(4): not supported, ma=Multimode(0), net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): UI <--- RIL_REQUEST_IMS_REGISTRATION_STATE (106) Complete --- RIL [RID 0, Token 22, Success, Len 8 ]
D/DATA (11529): [DSST(0)] Poll ServiceState done: oldSS=[3 home null null null Unknown CSS not supported -1 -1RoamInd: -1DefRoamInd: -1EmergOnly: false] newSS=[1 home null null null Unknown CSS not supported -1 -1RoamInd: -1DefRoamInd: -1EmergOnly: false]
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
I/TelephonyRegistry( 1565): notifyServiceState: 3 home null null null Unknown CSS not supported -1 -1RoamInd: -1DefRoamInd: -1EmergOnly: false
D/StatusBarPolicy( 1624): onServiceStateChanged:3 home null null null Unknown CSS not supported -1 -1RoamInd: -1DefRoamInd: -1EmergOnly: falsefor subscription :0
D/StatusBarPolicy( 1624): updateSignalStrength on subscription :0
D/StatusBarPolicy( 1624): updateDataIcon subscription =0
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
D/QCRIL ( 1464): RID 0 MID 0 Queued event CM_COMMAND_CALLBACK (12 bytes)
D/QCRIL ( 1464): qcril_event_main(): 1 items on queue
D/QCRIL ( 1464): RID 0 MID 0 De-queued event CM_COMMAND_CALLBACK (65537)
D/QCRIL ( 1464): RIL <--- CM_COMMAND_CALLBACK(65537), RID 0, MID 0 --- AMSS
D/QCRIL ( 1464): Change the state of ReqList entry to AWAITING_MORE_AMSS_EVENTS state : RIL_REQUEST_RADIO_POWER (23), Token ID 8, pending CM_PH_EVENT_OPRT_MODE (69632)
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/QCRIL ( 1464): Cnf 0x14 status 0x0
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/PowerManagerService( 1565): releaseWakeLock flags=0x1 tag=RILJ
I/TelephonyRegistry( 1565): notifyServiceState: 1 home Unknown CSS not supported -1 -1RoamInd: -1DefRoamInd: -1EmergOnly: false
D/StatusBarPolicy( 1624): onServiceStateChanged:1 home Unknown CSS not supported -1 -1RoamInd: -1DefRoamInd: -1EmergOnly: falsefor subscription :0
D/StatusBarPolicy( 1624): updateSignalStrength on subscription :0
D/StatusBarPolicy( 1624): updateDataIcon subscription =0
D/CallManager(11529): handleMessage (EVENT_SERVICE_STATE_CHANGED)
V/PhoneApp(11529): Action intent recieved:android.intent.action.SERVICE_STATE
D/QCRIL ( 1464): RID 0 MID 0 Queued event MMGSDI_EVENT_CALLBACK (1320 bytes)
D/QCRIL ( 1464): qcril_event_main(): 1 items on queue
D/QCRIL ( 1464): RID 0 MID 0 De-queued event MMGSDI_EVENT_CALLBACK (196610)
D/QCRIL ( 1464): RIL <--- MMGSDI_EVENT_CALLBACK(196610), RID 0, MID 0 --- AMSS
D/QCRIL ( 1464): MMGSDI_REFRESH_EVT
D/QCRIL ( 1464): RIL --- CM_CARD_STATUS_UPDATED(94209), RID 0, MID 0 ---> RIL
D/QCRIL ( 1464): Slot 0 Card status: Up --> Refresh
D/QCRIL ( 1464): RID 0 Slot 0, Pwr oprt in progress 0, Card status Down[2]
D/QCRIL ( 1464): RIL --- PBM_CARD_ERROR(397315), RID 0, MID 0 ---> RIL
D/QCRIL ( 1464): Not in airplane mode
D/QCRIL ( 1464): mmgsdi status 0x0 -> RIL_E_SUCCESS
D/QCRIL ( 1464): [RID 0] ReqList entries : Empty
D/QCRIL ( 1464): UI <--- RIL_REQUEST_GET_SIM_STATUS (1) Complete --- RIL [RID 0, Token 24, Success, Len 340 Card Error]
D/QCRIL ( 1464): RID 0 MID 0 HARDCODED_ECC ecc_len=4, ecc_val=118
D/DATA (11529): [DSST(0)] pollstate() : reason = icc status changed
D/PowerManagerService( 1565): acquireWakeLock flags=0x1 tag=RILJ
D/PowerManagerService( 1565): releaseWakeLock flags=0x1 tag=RILJ
D/QCRIL ( 1464): RID 0 MID 0 HARDCODED_ECC ecc_len=4, ecc_val=119
D/QCRIL ( 1464): RID 0 MID 0 Clear the network ecc List
D/QCRIL ( 1464): RID 0 voice srv: modem id=0, ma=Multimode(0), net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): RIL --- CM_CARD_STATUS_UPDATED(94209), RID 0, MID 0 ---> RIL
D/QCRIL ( 1464): Slot 0 Card status: Down --> Not Accessible
D/QCRIL ( 1464): RID 0 Slot 0, Pwr oprt in progress 0, Card status Not Accessible[4]
D/QCRIL ( 1464): Card Status
D/QCRIL ( 1464): -Card_State: RIL_CARDSTATE_ERROR
D/QCRIL ( 1464): -Universal Pin State: RIL_PINSTATE_UNKNOWN
D/QCRIL ( 1464): Invalid num_current_3gpp_indexes: 0
D/QCRIL ( 1464): Invalid num_current_3gpp2_indexes: 0
D/QCRIL ( 1464): Total number of Card Applications: 0x0
D/QCRIL ( 1464): UI <--- RIL_UNSOL_RESPONSE_SIM_STATUS_CHANGED (1019) --- RIL [RID 0, Len 0, (null)]
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/QCRIL ( 1464): qcril_event_main(): 1 items on queue
D/QCRIL ( 1464): RID 0 MID 0 De-queued event MMGSDI_COMMAND_CALLBACK (196609)
D/QCRIL ( 1464): RIL <--- MMGSDI_COMMAND_CALLBACK(196609), RID 0, MID 0 --- AMSS
D/QCRIL ( 1464): Cnf 0x14 status 0x1c
D/QCRIL ( 1464): RIL --- CM_CARD_STATUS_UPDATED(94209), RID 0, MID 0 ---> RIL
D/QCRIL ( 1464): Slot 0 Card status: Not Accessible --> PwrUp Failed
D/QCRIL ( 1464): RID 0 Slot 0, Pwr oprt in progress 0, Card status Not Accessible[4]
D/QCRIL ( 1464): qcril_event_main(): Waiting...
D/QCRIL ( 1464): UI --- RIL_REQUEST_DATA_REGISTRATION_STATE (21) ---> RIL [RID 0, token id 25, data len 0]
D/QCRIL ( 1464): RID 0 data tech: gwl modem id=0, pdt modem id=1, pdt=Unknown(0), ma=Multimode(0), net_pref=GSM WCDMA preferred(0)
D/QCRIL ( 1464): Current System : srv status 0, sys mode 0, roam status 0, srv domain 0, srv cap 3, IDM 0, hybrid 0, hdr srv status 0 managed roaming 0, mode pref 19
#### EDIT
on phone boot, i get this errors:
QCRIL: lgeat_null!
QCRIL: RID0: RadioState Uninitialized -> Radio Unavailable(Event Powerup Init)
Code:
D/QCRIL ( 1464): Card Status
D/QCRIL ( 1464): -Card_State: RIL_CARDSTATE_ERROR
D/QCRIL ( 1464): -Universal Pin State: RIL_PINSTATE_UNKNOWN
Caught this,may be interesting. Can you also list your ROM's build.prop please? wanna see something there
Code:
# begin build properties
# autogenerated by buildinfo.sh
ro.build.id=GINGERBREAD
ro.build.display.id=GINGERBREAD
ro.build.version.incremental=eng.root.20110712.092250
ro.build.version.sdk=10
ro.build.version.codename=REL
ro.build.version.release=2.3.4
ro.build.date=Tue Jul 12 09:23:33 CEST 2011
ro.build.date.utc=1310455413
ro.build.type=user
ro.build.user=root
ro.build.host=nblinux
ro.build.tags=test-keys
ro.product.model=LG-P500
ro.product.brand=lge
ro.product.name=thunderg
ro.product.device=thunderg
ro.product.board=thunderg
ro.product.cpu.abi=armeabi-v6l
ro.product.cpu.abi2=armeabi
ro.product.manufacturer=LGE
ro.product.locale.language=en
ro.product.locale.region=US
ro.wifi.channels=
ro.board.platform=msm7k
# ro.build.product is obsolete; use ro.product.device
ro.build.product=thunderg
# Do not try to parse ro.build.description or .fingerprint
ro.build.description=thunderg-user 2.3.4 GINGERBREAD eng.root.20110712.092250 test-keys
ro.build.fingerprint=thunderg/thunderg/thunderg:2.3.4/GINGERBREAD/eng.root.20110712.092250:user/test-keys
# end build properties
rild.libpath=/system/lib/libril-qc-1.so
rild.libargs=-d /dev/smd0
persist.rild.nitz_plmn=
persist.rild.nitz_long_ons_0=
persist.rild.nitz_long_ons_1=
persist.rild.nitz_long_ons_2=
persist.rild.nitz_long_ons_3=
persist.rild.nitz_short_ons_0=
persist.rild.nitz_short_ons_1=
persist.rild.nitz_short_ons_2=
persist.rild.nitz_short_ons_3=
DEVICE_PROVISIONED=1
#debug.sf.hw=1
debug.composition.type=mdp
#
# system props for the MM modules
#
# [email protected], 2011-02-25
#
media.stagefright.enable-player=true
#media.stagefright.enable-meta=false
media.stagefright.enable-scan=true
media.stagefright.enable-http=true
media.video.max-width=800
media.video.max-height=480
media.divx-video.max-width=720
media.divx-video.max-height=480
# system props for the data modules
#
ro.use_data_netmgrd=false
# Touch Key, [email protected], 2009-12-10
# SEARCH, BACK, HOME, MENU, CALL, END
#ro.lge.touchkey=BACK|SEARCH
# Vibrator amp default value
ro.lge.vibrator_amp=125
## wifi
wifi.interface=wlan0
wifi.supplicant_scan_interval=20
## opengles 2.0
ro.opengles.version=131072
#ro.ril.ecclist=112,911
# camera/camcorder options, [email protected]
ro.media.enc.hprof.file.format=mp4
ro.media.enc.hprof.codec.vid=m4v
ro.media.enc.hprof.codec.aud=amrnb
ro.media.enc.hprof.vid.width=640
ro.media.enc.hprof.vid.height=480
ro.media.enc.hprof.vid.fps=24
ro.media.enc.hprof.vid.bps=2000000
ro.media.enc.hprof.aud.bps=12200
ro.media.enc.hprof.aud.hz=8000
ro.media.enc.hprof.aud.ch=1
ro.media.enc.hprof.duration=60
ro.media.enc.lprof.file.format=3gp
ro.media.enc.lprof.codec.vid=m4v
ro.media.enc.lprof.codec.aud=amrnb
ro.media.enc.lprof.vid.width=176
ro.media.enc.lprof.vid.height=144
ro.media.enc.lprof.vid.fps=15
ro.media.enc.lprof.vid.bps=256000
ro.media.enc.lprof.aud.bps=12200
ro.media.enc.lprof.aud.hz=8000
ro.media.enc.lprof.aud.ch=1
ro.media.enc.lprof.duration=30
ro.media.enc.file.format=3gp,mp4
ro.media.enc.vid.codec=m4v,h263
ro.media.enc.aud.codec=amrnb
ro.media.enc.vid.h264.width=
ro.media.enc.vid.h264.height=
ro.media.enc.vid.h264.bps=
ro.media.enc.vid.h264.fps=
ro.media.enc.vid.h263.width=176,640
ro.media.enc.vid.h263.height=144,480
ro.media.enc.vid.h263.bps=64000,1000000
ro.media.enc.vid.h263.fps=1,24
ro.media.enc.vid.m4v.width=176,640
ro.media.enc.vid.m4v.height=144,480
ro.media.enc.vid.m4v.bps=64000,2000000
ro.media.enc.vid.m4v.fps=1,24
ro.media.enc.aud.amrnb.bps=5525,12200
ro.media.enc.aud.amrnb.hz=8000,8000
ro.media.enc.aud.amrnb.ch=1,1
ro.media.enc.aud.aac.bps=
ro.media.enc.aud.aac.hz=
ro.media.enc.aud.aac.ch=
ro.media.dec.aud.wma.enabled=0
ro.media.dec.vid.wmv.enabled=0
ro.media.cam.preview.fps=0
ro.media.dec.jpeg.memcap=20000000
ro.media.enc.jpeg.quality=90,80,70
# LGE_CHANGE_S, [[email protected]], 2010-05-03, < Enabed EONS feature >
persist.cust.tel.eons=1
# LGE_CHANGE_E, [[email protected]], 2010-05-03, < Enabed EONS feature >
#increase dalvik heap size, [email protected], 20100719
dalvik.vm.dexopt-flags=m=y
dalvik.vm.heapsize=32m
dalvik.vm.execution-mode=int:jit
#
# ADDITIONAL_BUILD_PROPERTIES
#
ro.setupwizard.mode=DISABLED
ro.com.google.gmsversion=2.3_r3
ro.config.ringtone=CityofMist.ogg
ro.config.notification_sound=OnTheHunt.ogg
ro.config.alarm_alert=Alarm_Beep01.ogg
ro.com.google.clientidbase=android-lge
ro.com.google.clientidbase.ms=android-hms-vf-{country}
ro.com.google.clientidbase.gmm=android-lge
ro.com.google.clientidbase.yt=android-lge
ro.com.google.clientidbase.am=android-lge
net.bt.name=Android
dalvik.vm.stack-trace-file=/data/anr/traces.txt
#
# ADDITIONAL_BUILD_PROPERTIES
#
ro.ril.hsxpa=2
ro.ril.gprsclass=12
ro.config.notification_sound=OnTheHunt.ogg
ro.config.alarm_alert=Alarm_Classic.ogg
ro.lge.vibrator_amp=125
ro.sf.lcd_density=160
net.bt.name=Android
dalvik.vm.stack-trace-file=/data/anr/traces.txt
btw:
does RIL depends on Country? i 've seen RIL is using the flex from LG, my RIL libs are from Romania ROM - should i try the other with MiddleEurope support?
Flashed Baseband V20g again, installed CM7 rom, flashed mik's RIL patch - i dont have GSM, flashed Romania LG gingerbread - it works complete.
do i'm something wrong??? i dont have a idea what i can do now
I had earlier flashed v20a. Then I flashed cm7. After this I flashed mik's patch. GSM was back but data was not working.
Edit: afaik v20a and v20g baseband are slightly different. But I think it doesn't matter.
Sent from my LG-P500 using Tapatalk
i give up to develop on this ****ing LG phone, i can spend my time even so to the toilette, its the same effect without a sense
have a good time here, might be we see us later in another topic - i sale my P500 and buy me a really PHONE!

[Q] How to verify hardware failure on Audio inout jack?

I've been using DarkyROM 10.1 for over 4 months now with no problems whatsoever.
Till a week back my headphone started not to work on the left earphone. It was time to change it. I went today to replace the headphone and when I was testing the headphone button it didn't work.
Further more I tried to test the mic on calls and it is not working. The built in mic is the only thing working.
It looks like the phone is stuck in the button pressed mode which I think mutes the mic.
I got the dmesg log and the jack info there was as the following,
/ # dmesg | grep jack
dmesg | grep jack
<6>[ 186.249633] sec_jack_set_type : jack_type = 2
<6>[ 230.395379] sec_jack_set_type : jack_type = 0
<6>[ 851.884970] sec_jack_set_type : jack_type = 2
<6>[ 908.898467] sec_jack_set_type : jack_type = 0
<6>[ 913.641106] sec_jack_set_type : jack_type = 2
<6>[ 914.764902] sec_jack_set_type : jack_type = 0
<6>[ 917.147299] active wake lock sec_jack_det, time left 1322
<6>[ 921.237020] sec_jack_set_type : jack_type = 2
<6>[ 930.587688] sec_jack_set_type : jack_type = 0
<6>[ 3053.033646] sec_jack_set_type : jack_type = 2
<6>[ 3127.994797] sec_jack_set_type : jack_type = 0
<6>[ 3139.175387] sec_jack_set_type : jack_type = 2
<6>[ 3331.251091] sec_jack_set_type : jack_type = 0
<6>[ 3334.832856] active wake lock sec_jack_det, time left 723
<6>[ 3748.558797] sec_jack_set_type : jack_type = 2
<6>[ 4256.425996] sec_jack_set_type : jack_type = 0
<6>[ 4263.752653] sec_jack_set_type : jack_type = 2
<6>[ 4273.007345] sec_jack_set_type : jack_type = 0
<6>[ 4288.558637] sec_jack_set_type : jack_type = 2
<6>[ 4294.126007] sec_jack_set_type : jack_type = 0
<6>[ 4307.354710] sec_jack_set_type : jack_type = 2
<6>[ 4307.827809] sec_jack_set_type : jack_type = 0
<6>[ 4327.778638] sec_jack_set_type : jack_type = 2
<6>[ 4329.332950] sec_jack_set_type : jack_type = 0
<6>[ 5523.733072] sec_jack_set_type : jack_type = 2
<6>[ 5568.944868] sec_jack_set_type : jack_type = 0
<6>[ 5611.345671] wakeup wake lock: sec_jack_det
<6>[ 5614.900765] sec_jack_set_type : jack_type = 2
<6>[ 5615.948397] sec_jack_set_type : jack_type = 0
<6>[ 5622.514618] wake lock sec_jack_det, expired
<6>[ 5622.719607] wakeup wake lock: sec_jack_det
<6>[ 5626.224616] sec_jack_set_type : jack_type = 2
<6>[ 5655.934294] sec_jack_set_type : jack_type = 0
<6>[ 5663.190634] sec_jack_set_type : jack_type = 2
<6>[ 5678.021070] sec_jack_set_type : jack_type = 0
Each time I plug the headphone I get nothing I remove it I get the two lines
<6>[ 5663.190634] sec_jack_set_type : jack_type = 2
<6>[ 5678.021070] sec_jack_set_type : jack_type = 0
Is it the problem that it is stuck in button pushed mode?
I tried to clear dalvik cache but it was of no use.
Would a fresh flashing do the trick? or is it a hardware damage?
P.S. When I discovered that the headphone is faulty the button was still working. it's only today that I have discovered it is not working when I tried to buy a new one.
Later on I went and installed DarkyROM 10.2.2 EE and did a date Wipe and it's the same issue, I even went further and formatted everything and went with a stock 2.3.5 and it's the same thing.
What I can think of now is a hardware failure, but I need to be 100% sure of that before sending it to the service center.
Can you guys help me with debugging this even more?
Thanks and sorry for the long thread.

[Q] - High io activity ?

Hi all,
I am trying to track down the slowness problem on my sgs.
I think that the problem is the io system.
Can someone tell me his thoughts about this iostat output ?
Code:
CPU: 13.1% usr 2.7% sys 0.0% nic 0.0% idle 82.4% io 0.0% irq 1.5% sirq
Load average: 3.46 2.08 1.50 2/542 4702
PID PPID USER STAT VSZ %VSZ CPU %CPU COMMAND
2353 90 10115 S 176m 48.2 0 11.5 {d.process.acore} android.process.
690 90 system S 277m 75.7 0 1.7 system_server
62 2 root DW 0 0.0 0 1.5 [mmcqd]
5 2 root RW 0 0.0 0 1.0 [events/0]
809 90 system S 160m 43.8 0 0.3 {ndroid.systemui} com.android.syst
2148 2141 root R 2260 0.6 0 0.3 /system/xbin/busybox /sbin/top
15 2 root SW 0 0.0 0 0.3 [kondemand/0]
822 90 radio S 172m 46.9 0 0.1 {m.android.phone} com.android.phon
2561 90 10093 S 138m 37.8 0 0.1 org.dayup.gtask
100 1 compass S 2880 0.7 0 0.1 /system/bin/orientationd
861 90 10044 S 226m 61.8 0 0.0 {e.process.gapps} com.google.proce
31608 1 10175 S 186m 50.8 0 0.0 {udsandsheepfree} com.hg.cloudsand
2681 90 10061 S 174m 47.6 0 0.0 {ogle.android.gm} com.google.andro
2711 90 10054 S 169m 46.0 0 0.0 {LocationService} com.google.andro
2626 90 10054 S 166m 45.5 0 0.0 {droid.apps.maps} com.google.andro
2318 90 10104 S 151m 41.3 0 0.0 {droid.apps.plus} com.google.andro
1668 90 10084 S 151m 41.1 0 0.0 {nputmethod.axt9} com.sec.android.
2733 90 10054 S 150m 41.1 0 0.0 {onFriendService} com.google.andro
2726 90 10054 S 144m 39.4 0 0.0 {s:FriendService} com.google.a

Fallout 4 CM12-13 Boot Animation

I Had An Idea For A CM Boot Animation Inspired By Fallout 4 Pipboy Start Up It Would Be A Boot Animation Ported Towards CM Because It Can Have Animation When Finished Loading. If You Seen It You'd Probably Catch What I'm Saying. Its A BIOS Boot Like A Old Terminal And Its Sweet
[YOUTUBE]https://www.youtube.com/watch?v=RyIw_-cCBeQ
[/YOUTUBE]
EXAMPLE
/SUDO INT BOOT IN E:/BOOT.IMG
/START ROM
00000000000x000000000x0000x000x000x0x0x0000000000000000000000x0000x00000x000x00Start Board Discovery 0 0X000000000x00000x00x000x0x000x00x000x00x000x000x Starting Ubuntu Shell 000x00x00x0000x0000x0000x000x0000x0000x000000x00000 10 00 00000 110 0000 000 00100 010 000000000000000 Starting EFI 0 11 0 000000000 0000 000000000 000 000 00 00000 000000 00 00000000001000 0x00 000x00000 x0000xx00000 Starting Shell Relocation00000000000x000000000x0000x000x000x0x0x0000000000000000000000x0000x00000x000x00Start Board Discovery 0 0X000000000x00000x00x000x0x000x00x000x00x000x000x Starting Ubuntu Shell 000x00x00x0000x0000x0000x000x0000x0000x000000x00000 10 00 00000 110 0000 000 00100 010 000000000000000 Starting EFI 0 11 0 000000000 0000 000000000 000 000 00 00000 000000 00 00000000001000 0x00 000x00000 x0000xx00000 Starting Shell Relocation00000000000x000000000x0000x000x000x0x0x0000000000000000000000x0000x00000x000x00Start Board Discovery 0 0X000000000x00000x00x000x0x000x00x000x00x000x000x Starting Ubuntu Shell 000x00x00x0000x0000x0000x000x0000x0000x000000x00000 10 00 00000 110 0000 000 00100 010 000000000000000 Starting EFI 0 11 0 000000000 0000 000000000 000 000 00 00000 000000 00 00000000001000 0x00 000x00000 x0000xx00000 Starting Shell Relocation00000000000x000000000x0000x000x000x0x0x0000000000000000000000x0000x00000x000x00Start Board Discovery 0 0X000000000x00000x00x000x0x000x00x000x00x000x000x Starting Ubuntu Shell 000x00x00x0000x0000x0000x000x0000x0000x000000x00000 10 00 00000 110 0000 000 00100 010 000000000000000 Starting EFI 0 11 0 000000000 0000 000000000 000 000 00 00000 000000 00 00000000001000 0x00 000x00000 x0000xx00000 Starting Shell Relocation00000000000x000000000x0000x000x000x0x0x0000000000000000000000x0000x00000x000x00Start Board Discovery 0 0X000000000x00000x00x000x0x000x00x000x00x000x000x Starting Ubuntu Shell 000x00x00x0000x0000x0000x000x0000x0000x000000x00000 10 00 00000 110 0000 000 00100 010 000000000000000 Starting EFI 0 11 0 000000000 0000 000000000 000 000 00 00000 000000 00 00000000001000 0x00 000x00000 x0000xx00000 Starting Shell Relocation
**********Android-OS ® V5.1.1**********
Copyright 2015 GOOGLE ®
Loader V1.1 TEST-KEYS
EXEC VERSION 41.10
CORE: MALI
1500 MB RAM System
ERROR :MB FREE
No External OS Found
Load ROM(1): DEITRIX 303
But You Can Edit In App The Device Specs So It Can Show Up Correctly And Not Look Dumb Like A Stationary Loading Screen
Example
Core: INSERT
RAM: INSERT

Question [BUG/FIXED] Occasional screen failure in Lineage/LMODroid.

UPDATE 2: I'm editing the title as I have now considered the issue FIXED. It's been 6 months since then and I haven't seen a single occurrence of screen failure. During the period I've updated the system using LMODroid's updater several times. Everything's fine so far.
UPDATE: A commit that appears to have fixed the issue has been merged and is now available as of LMODroid 20230121. So far no screen failure observed for the past few days. If the issue does not resurface for a long enough period, the issue can be considered fixed. Many thanks to Electimon for the commit.
Originally I posted a series of reports on the unofficial LOS19 thread regarding an infrequent but very annoying issue that the screen may sometimes fail to turn on and require a system reboot to recover.
This affects both Lineage and LMODroid. I'm currently on LMODroid. It keeps USB debugging turned on by default so it's much easier to obtain logcats whenever it happens.
Here are something I've found:
1. The screen can die under any circumstance with the error having a chance to happen every time the screen turns on. Fingerprint sensor, as well as other aspects such as HBM, have been ruled out as possible causes, since the issue can be reproduced under situations not involving them at all.
2. Whenever it happens, the "dsi-ctrl-0: Command transfer failed" error would repeat exactly 72 times. The logcat does not explain what exactly these 72 commands are, however.
3. In some builds, a DSI PLL(0) lock failure error would be the first to appear, like in this one, while in other builds, that error would not show up and the first error message would be the command transfer failure. The rest of the error messages remain identical from what I could see.
4. Previously, from the logcat, the phone would try to re-initialize the panel twice (which always failed), before giving up and ignoring any further bl_level changes. However, as of this build (LMODroid 20230107), the situation changed. I've noticed some additional DSI-related log entries, that were not present from logcats captured from previous builds, and it seems to be trying to re-initialize the panel a few more times than before.
Here's a recent logcat I got from the LMODroid 20230107 build, filtered by the keyword "dsi". The issue has been ongoing since at least 20221201 when I first started using it. I added a separator before lines that are new to the 20230107 build.
Spoiler: Logcat excerpt from LMODroid 20230107 build, filtered by keyword "dsi"
Code:
01-11 08:00:25.185 0 0 I [drm:dsi_display_set_mode] [msm-dsi-info]: mdp_transfer_time_us=6144 us
01-11 08:00:25.185 0 0 I [drm:dsi_display_set_mode] [msm-dsi-info]: hactive= 1080,vactive= 2400,fps=144
01-11 08:00:25.185 0 0 I [drm:dsi_display_prepare] [msm-dsi-info]: panel_name=mipi_mot_cmd_csot_1080p_dsc_667 ctrl-index=0
01-11 08:00:25.186 0 0 I [drm:dsi_ctrl_isr_configure] [msm-dsi-info]: dsi-ctrl-0: IRQ 528 registered
01-11 08:00:25.186 0 0 I [drm:dsi_panel_power_on] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-11 08:00:25.206 0 0 I [drm:dsi_panel_enable] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-11 08:00:25.331 0 0 I [drm:dsi_panel_enable] [msm-dsi-info]: Pwr_mode(0x0A) = 0x9c
01-11 08:00:25.332 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: bl_level changed from 0 to 0
01-11 08:00:25.332 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:0
01-11 08:00:25.381 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: bl_level changed from 0 to 484
01-11 08:00:25.381 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:484
01-11 08:01:17.154 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: bl_level changed from 484 to 0
01-11 08:01:17.154 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:0
01-11 08:01:17.191 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: bl_level changed from 0 to 0
01-11 08:01:17.191 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:0
01-11 08:01:17.205 0 0 I [drm:dsi_display_disable] [msm-dsi-info]: dsi_display_disable(DSI-1)+
01-11 08:01:17.205 0 0 I [drm:dsi_panel_disable] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-11 08:01:17.211 0 0 I [drm:dsi_panel_send_param_cmd] [msm-dsi-info]: dsi_panel_send_param_cmd: param_name=HBM; val_max =2, default_value=0, value=0
01-11 08:01:17.326 0 0 I : display 00000000fb51b681, name qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2 is_dsi_mot_primary(0)
01-11 08:01:17.326 0 0 I [drm:dsi_panel_send_param_cmd] [msm-dsi-info]: (mode=0): requested value=0 is same. Do nothing
01-11 08:01:17.326 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:0
01-11 08:01:17.331 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-11 08:01:17.331 0 0 E dsi_pll_enable: PLL(0) lock failed
01-11 08:01:17.331 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-11 08:01:17.331 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-11 08:01:17.331 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-11 08:01:17.331 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-11 08:01:17.331 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-11 08:01:17.331 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-11 08:01:17.331 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-11 08:01:17.331 0 0 E : [drm:dsi_host_transfer] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to enable all DSI clocks, rc=-110
01-11 08:01:17.331 0 0 E : [drm:dsi_panel_set_backlight] *ERROR* [msm-dsi-error]: failed to update dcs backlight:0
01-11 08:01:17.331 0 0 E : [drm:dsi_panel_set_param] *ERROR* [msm-dsi-error]: unable to set backlight
01-11 08:01:17.331 0 0 I [drm:dsi_panel_post_unprepare] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-11 08:10:50.942 0 0 I [drm:dsi_display_set_mode] [msm-dsi-info]: mdp_transfer_time_us=6144 us
01-11 08:10:50.942 0 0 I [drm:dsi_display_set_mode] [msm-dsi-info]: hactive= 1080,vactive= 2400,fps=144
01-11 08:10:50.942 0 0 I [drm:dsi_display_prepare] [msm-dsi-info]: panel_name=mipi_mot_cmd_csot_1080p_dsc_667 ctrl-index=0
01-11 08:10:50.942 0 0 I [drm:dsi_ctrl_isr_configure] [msm-dsi-info]: dsi-ctrl-0: IRQ 528 registered
01-11 08:10:50.942 0 0 I [drm:dsi_panel_power_on] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-11 08:10:50.974 0 0 I [drm:dsi_panel_enable] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-11 08:10:51.150 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:51.350 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:51.550 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:51.750 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:51.951 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:52.150 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:52.350 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:52.551 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:52.754 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:52.957 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:53.160 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:53.361 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:53.564 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:53.764 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:53.964 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:54.164 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:54.365 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:54.564 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:54.764 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:54.965 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:55.164 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:55.364 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:55.565 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:55.764 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:55.964 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:56.164 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:56.364 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:56.564 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:56.765 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:56.964 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:57.164 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:57.364 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:57.564 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:57.764 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:57.965 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:58.164 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:58.365 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:58.564 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:58.764 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:58.965 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:59.166 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:59.365 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:59.565 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:59.765 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:10:59.965 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:00.165 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:00.365 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:00.565 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:00.764 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:00.964 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:01.164 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:01.364 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:01.564 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:01.764 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:01.964 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:02.164 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:02.364 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:02.564 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:02.764 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:02.964 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:03.164 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:03.365 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:03.565 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:03.764 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:03.964 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:04.164 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:04.364 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:04.565 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:04.765 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:04.964 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:05.285 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:05.484 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-11 08:11:05.484 0 0 E : [drm:dsi_ctrl_hw_cmn_get_cmd_read_data] *ERROR* [msm-dsi-error]: DSI_0: Panel detected error, no data read
01-11 08:11:05.484 0 0 E : [drm:dsi_ctrl_cmd_transfer] *ERROR* [msm-dsi-error]: dsi-ctrl-0: read message failed read length, rc=0
01-11 08:11:05.484 0 0 E : [drm:dsi_display_cmd_mipi_transfer] *ERROR* [msm-dsi-error]: failed to transfer cmd. rc = 0
01-11 08:11:05.484 0 0 E : [drm:dsi_panel_enable] *ERROR* [msm-dsi-error]: Failed to call dsi_display_cmd_transfer. rc=0
01-11 08:11:05.484 0 0 E : [drm:dsi_panel_enable] *ERROR* [msm-dsi-error]: [mipi_mot_cmd_csot_1080p_dsc_667] Failed to read pwr_mode, rc = -5
01-11 08:11:05.484 0 0 E : [drm:dsi_display_enable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to enable DSI panel, rc=-5
01-11 08:11:05.484 0 0 E : [drm:dsi_bridge_pre_enable] *ERROR* [msm-dsi-error]: [0] DSI display enable failed, rc=-5
01-11 08:11:05.484 0 0 I : display 00000000fb51b681, name qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2 is_dsi_mot_primary(0)
01-11 08:11:05.484 0 0 I [drm:dsi_panel_post_unprepare] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-11 08:11:05.499 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-11 08:11:05.499 0 0 E dsi_pll_enable: PLL(0) lock failed
01-11 08:11:05.499 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-11 08:11:05.499 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-11 08:11:05.499 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-11 08:11:05.499 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-11 08:11:05.499 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-11 08:11:05.499 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-11 08:11:05.499 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-11 08:11:05.504 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-11 08:11:05.504 0 0 E dsi_pll_enable: PLL(0) lock failed
01-11 08:11:05.504 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-11 08:11:05.504 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-11 08:11:05.504 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-11 08:11:05.504 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-11 08:11:05.504 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-11 08:11:05.504 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-11 08:11:05.504 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-11 08:11:05.504 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 0 as panel is not init.
01-11 08:11:06.513 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 0 as panel is not init.
--------
---- NOTE: The following log lines are new to LMODroid 20230107, and were not present in logcats from previous builds
--------
01-11 08:11:06.518 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-11 08:11:06.518 0 0 E dsi_pll_enable: PLL(0) lock failed
01-11 08:11:06.518 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-11 08:11:06.518 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-11 08:11:06.518 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-11 08:11:06.518 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-11 08:11:06.518 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-11 08:11:06.518 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-11 08:11:06.518 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-11 08:11:06.520 0 0 I [drm:dsi_display_disable] [msm-dsi-info]: dsi_display_disable(DSI-1)+
01-11 08:11:06.520 0 0 E : [drm:dsi_display_cmd_engine_disable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] Invalid refcount
01-11 08:11:06.520 0 0 I [drm:dsi_panel_disable] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-11 08:11:06.520 0 0 E : [drm:dsi_ctrl_check_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: State error: op=1: 1, 0
01-11 08:11:06.520 0 0 E : [drm:dsi_ctrl_set_cmd_engine_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-11 08:11:06.520 0 0 E : [drm:dsi_display_cmd_engine_enable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to enable cmd engine, rc=-22
01-11 08:11:06.520 0 0 E : [drm:dsi_host_transfer] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to enable cmd engine, rc=-22
01-11 08:11:06.520 0 0 E : [drm:dsi_panel_tx_cmd_set] *ERROR* [msm-dsi-error]: failed to set cmds(4), rc=-22
01-11 08:11:06.520 0 0 W : [mipi_mot_cmd_csot_1080p_dsc_667] failed to send DSI_CMD_SET_OFF cmds, rc=-22
01-11 08:11:06.520 0 0 I : display 00000000fb51b681, name qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2 is_dsi_mot_primary(0)
01-11 08:11:06.520 0 0 E : [drm:dsi_ctrl_check_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: No change in state, ctrl_state=0
01-11 08:11:06.520 0 0 E : [drm:dsi_ctrl_set_host_engine_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-11 08:11:06.520 0 0 E : [drm:dsi_display_ctrl_host_disable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable host engine, rc=-22
01-11 08:11:06.520 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable DSI host, rc=-22
01-11 08:11:06.525 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-11 08:11:06.525 0 0 E dsi_pll_enable: PLL(0) lock failed
01-11 08:11:06.525 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-11 08:11:06.525 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-11 08:11:06.525 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-11 08:11:06.525 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-11 08:11:06.525 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-11 08:11:06.525 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-11 08:11:06.525 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-11 08:11:06.525 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable Link clocks, rc=-110
01-11 08:11:06.525 0 0 E : [drm:dsi_ctrl_host_deinit] *ERROR* [msm-dsi-error]: dsi-ctrl-0: No change in state, host_init=0
01-11 08:11:06.525 0 0 E : [drm:dsi_ctrl_host_deinit] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-11 08:11:06.525 0 0 E : [drm:dsi_ctrl_host_deinit] *ERROR* [msm-dsi-error]: dsi-ctrl-0: driver state check failed, rc=-22
01-11 08:11:06.525 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to deinit host_0, rc=-22
01-11 08:11:06.525 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to deinit controller, rc=-22
01-11 08:11:06.525 0 0 W [drm] [msm-dsi-warn]: DSI_0: Turning OFF PHY while PLL is on
01-11 08:11:06.530 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-11 08:11:06.530 0 0 E dsi_pll_enable: PLL(0) lock failed
01-11 08:11:06.530 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-11 08:11:06.530 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-11 08:11:06.530 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-11 08:11:06.530 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-11 08:11:06.530 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-11 08:11:06.530 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-11 08:11:06.530 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-11 08:11:06.530 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable DSI clocks, rc=-110
01-11 08:11:06.530 0 0 I [drm:dsi_panel_post_unprepare] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-11 08:11:06.535 0 0 E : [drm:dsi_pwr_enable_regulator] *ERROR* [msm-dsi-error]: Unbalanced regulator off:vddio
Additionally, this particular error message seems to indicate some issue with the regulator, but I'm not entirely sure. This error message was not present in logcats from previous builds.
Code:
01-11 08:11:06.535 0 0 E : [drm:dsi_pwr_enable_regulator] *ERROR* [msm-dsi-error]: Unbalanced regulator off:vddio
I'm not an expert, so I've no idea about this regulator (vddio) error but these new messages might lead to something closer to the root cause of the issue.
Personally, this display problem is the only issue deemed major for this device at the moment. Everything else appears to work fine and out-of-box.
I think the related code might be in here: https://github.com/LineageOS/androi...50/tree/lineage-19.1/techpack/display/msm/dsi
After some brief searching I located the line where the "unbalanced regulator off" logcat is being generated:
android_kernel_motorola_sm8250/techpack/display/msm/dsi/dsi_pwr.c at 7a4d260c7e480b1f82039ebe762b6df9811284f8 · LineageOS/android_kernel_motorola_sm8250
Contribute to LineageOS/android_kernel_motorola_sm8250 development by creating an account on GitHub.
github.com
Right now I'm pointing to the lineage-19.1 branch. I don't know if this is really the branch being used for current LineageOS/LMODroid builds. There are some other branches, namely the lineage-20 one, that are more active and have commits that involved this part.
An update on this... managed to actually capture a dsi-related logcat today when it happened. The logcat looked very different from before, so it's possible LMODroid 20230114 did have this change incorporated... assuming it's also using the lineage-19.1 branch...
drm/panel: check panel status before send custom commands · LineageOS/[email protected]
drm/panel: Check whether panel is ready, before send custom command. Otherwise, try to enable dsi,but actually fail. Change-Id: Ia34efc2a6fe386e4d713303ce52248ebeb62c5a8 Signed-off-by: wangyq13 &l...
github.com
Spoiler: Here's this time's logcat excerpt (filtered by keyword "dsi")
Code:
01-20 16:32:21.075 0 0 I [drm:dsi_display_set_mode] [msm-dsi-info]: mdp_transfer_time_us=6144 us
01-20 16:32:21.075 0 0 I [drm:dsi_display_set_mode] [msm-dsi-info]: hactive= 1080,vactive= 2400,fps=144
01-20 16:32:21.075 0 0 I [drm:dsi_display_prepare] [msm-dsi-info]: panel_name=mipi_mot_cmd_csot_1080p_dsc_667 ctrl-index=0
01-20 16:32:21.075 0 0 I [drm:dsi_ctrl_isr_configure] [msm-dsi-info]: dsi-ctrl-0: IRQ 528 registered
01-20 16:32:21.075 0 0 I [drm:dsi_panel_power_on] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-20 16:32:20.799 0 0 I [drm:dsi_panel_enable] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-20 16:32:20.925 0 0 I [drm:dsi_panel_enable] [msm-dsi-info]: Pwr_mode(0x0A) = 0x9c
01-20 16:32:20.927 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: bl_level changed from 0 to 0
01-20 16:32:20.927 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:0
01-20 16:32:20.949 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: bl_level changed from 0 to 397
01-20 16:32:20.949 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:397
01-20 16:38:49.010 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:384
01-20 16:38:49.015 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:376
01-20 16:38:49.021 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:367
01-20 16:38:49.027 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:359
01-20 16:38:49.032 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:350
01-20 16:38:49.039 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:342
01-20 16:38:49.046 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:335
01-20 16:38:49.053 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:327
01-20 16:38:49.060 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:320
01-20 16:38:49.067 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:313
01-20 16:38:49.074 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:306
01-20 16:38:49.081 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:299
01-20 16:38:49.088 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:293
01-20 16:38:49.095 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:286
01-20 16:38:49.103 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:280
01-20 16:38:49.110 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:274
01-20 16:38:49.118 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:268
01-20 16:38:49.124 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:262
01-20 16:38:49.132 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:257
01-20 16:38:49.138 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:251
01-20 16:38:49.146 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:246
01-20 16:38:49.153 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:241
01-20 16:38:49.159 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:236
01-20 16:38:49.166 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:231
01-20 16:38:49.173 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:227
01-20 16:38:49.181 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:222
01-20 16:38:49.187 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:218
01-20 16:38:49.193 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:213
01-20 16:38:49.200 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:209
01-20 16:38:49.208 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:205
01-20 16:38:49.214 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:201
01-20 16:38:49.222 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:197
01-20 16:38:49.228 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:193
01-20 16:38:49.236 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:189
01-20 16:38:49.242 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:186
01-20 16:38:49.250 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:182
01-20 16:38:49.256 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:179
01-20 16:38:49.263 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:176
01-20 16:38:49.270 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:172
01-20 16:38:49.277 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:169
01-20 16:38:49.284 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:166
01-20 16:38:49.292 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:163
01-20 16:38:49.298 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:160
01-20 16:38:49.305 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:156
01-20 16:38:49.312 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:153
01-20 16:38:49.319 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:150
01-20 16:38:49.326 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:147
01-20 16:38:49.332 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:144
01-20 16:38:49.339 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:141
01-20 16:38:49.346 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:138
01-20 16:38:49.353 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:136
01-20 16:38:49.362 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:133
01-20 16:38:49.367 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:130
01-20 16:38:49.374 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:127
01-20 16:38:49.380 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:124
01-20 16:38:49.386 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:122
01-20 16:38:49.393 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:119
01-20 16:38:49.401 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:116
01-20 16:38:49.408 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:114
01-20 16:38:49.415 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:111
01-20 16:38:49.422 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:110
01-20 16:38:56.459 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: bl_level changed from 110 to 0
01-20 16:38:56.459 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:0
01-20 16:38:56.512 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: bl_level changed from 0 to 0
01-20 16:38:56.512 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:0
01-20 16:38:56.526 0 0 I [drm:dsi_display_disable] [msm-dsi-info]: dsi_display_disable(DSI-1)+
01-20 16:38:56.526 0 0 I [drm:dsi_panel_disable] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-20 16:38:56.532 0 0 I [drm:dsi_panel_send_param_cmd] [msm-dsi-info]: dsi_panel_send_param_cmd: param_name=HBM; val_max =2, default_value=0, value=0
01-20 16:38:56.646 0 0 I : display 0000000032af03ad, name qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2 is_dsi_mot_primary(0)
01-20 16:38:56.646 0 0 I [drm:dsi_panel_send_param_cmd] [msm-dsi-info]: (mode=0): requested value=0 is same. Do nothing
01-20 16:38:56.646 0 0 I [drm:dsi_panel_set_backlight] [msm-dsi-info]: backlight type:2 lvl:0
01-20 16:38:56.646 0 0 E : [drm:dsi_ctrl_check_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: State error (eng on): op=0: 1, 0
01-20 16:38:56.646 0 0 E : [drm:dsi_ctrl_set_host_engine_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-20 16:38:56.646 0 0 E : [drm:dsi_display_ctrl_host_disable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable host engine, rc=-22
01-20 16:38:56.646 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable DSI host, rc=-22
01-20 16:38:56.646 0 0 W [drm] [msm-dsi-warn]: DSI_0: Turning OFF PHY while PLL is on
01-20 16:38:56.648 0 0 I : dsi_link_hs_clk_stop+0x20/0x70
01-20 16:38:56.648 0 0 I : dsi_clk_update_link_clk_state+0x1dc/0x280
01-20 16:38:56.648 0 0 I : dsi_recheck_clk_state+0x368/0x5d4
01-20 16:38:56.648 0 0 I : dsi_clk_req_state+0x1d0/0x254
01-20 16:38:56.648 0 0 I : dsi_display_clk_ctrl+0x40/0xa4
01-20 16:38:56.648 0 0 I : dsi_host_transfer+0x338/0x4e0
01-20 16:38:56.648 0 0 I : mipi_dsi_dcs_set_display_brightness_2bytes+0xbc/0x114
01-20 16:38:56.648 0 0 I : dsi_panel_set_backlight+0x270/0x3cc
01-20 16:38:56.648 0 0 I : dsi_panel_set_param+0x1b8/0x31c
01-20 16:38:56.648 0 0 I : dsi_display_set_param+0x58/0xa0
01-20 16:38:56.648 0 0 I : dsi_display_mot_kmsprop_store+0x90/0x108
01-20 16:38:56.649 0 0 I : dsi_link_hs_clk_stop+0x28/0x70
01-20 16:38:56.649 0 0 I : dsi_clk_update_link_clk_state+0x1dc/0x280
01-20 16:38:56.649 0 0 I : dsi_recheck_clk_state+0x368/0x5d4
01-20 16:38:56.649 0 0 I : dsi_clk_req_state+0x1d0/0x254
01-20 16:38:56.649 0 0 I : dsi_display_clk_ctrl+0x40/0xa4
01-20 16:38:56.649 0 0 I : dsi_host_transfer+0x338/0x4e0
01-20 16:38:56.649 0 0 I : mipi_dsi_dcs_set_display_brightness_2bytes+0xbc/0x114
01-20 16:38:56.649 0 0 I : dsi_panel_set_backlight+0x270/0x3cc
01-20 16:38:56.649 0 0 I : dsi_panel_set_param+0x1b8/0x31c
01-20 16:38:56.649 0 0 I : dsi_display_set_param+0x58/0xa0
01-20 16:38:56.649 0 0 I : dsi_display_mot_kmsprop_store+0x90/0x108
01-20 16:38:56.650 0 0 I : dsi_link_hs_clk_stop+0x30/0x70
01-20 16:38:56.650 0 0 I : dsi_clk_update_link_clk_state+0x1dc/0x280
01-20 16:38:56.650 0 0 I : dsi_recheck_clk_state+0x368/0x5d4
01-20 16:38:56.650 0 0 I : dsi_clk_req_state+0x1d0/0x254
01-20 16:38:56.650 0 0 I : dsi_display_clk_ctrl+0x40/0xa4
01-20 16:38:56.650 0 0 I : dsi_host_transfer+0x338/0x4e0
01-20 16:38:56.650 0 0 I : mipi_dsi_dcs_set_display_brightness_2bytes+0xbc/0x114
01-20 16:38:56.650 0 0 I : dsi_panel_set_backlight+0x270/0x3cc
01-20 16:38:56.650 0 0 I : dsi_panel_set_param+0x1b8/0x31c
01-20 16:38:56.650 0 0 I : dsi_display_set_param+0x58/0xa0
01-20 16:38:56.650 0 0 I : dsi_display_mot_kmsprop_store+0x90/0x108
01-20 16:38:56.650 0 0 I [drm:dsi_panel_post_unprepare] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-20 16:44:06.734 0 0 I [drm:dsi_display_set_mode] [msm-dsi-info]: mdp_transfer_time_us=6144 us
01-20 16:44:06.734 0 0 I [drm:dsi_display_set_mode] [msm-dsi-info]: hactive= 1080,vactive= 2400,fps=144
01-20 16:44:06.734 0 0 I [drm:dsi_display_prepare] [msm-dsi-info]: panel_name=mipi_mot_cmd_csot_1080p_dsc_667 ctrl-index=0
01-20 16:44:06.734 0 0 I [drm:dsi_ctrl_isr_configure] [msm-dsi-info]: dsi-ctrl-0: IRQ 528 registered
01-20 16:44:06.734 0 0 I [drm:dsi_panel_power_on] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-20 16:44:06.745 0 0 E : [drm:dsi_ctrl_check_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: No change in state, ctrl_state=1
01-20 16:44:06.745 0 0 E : [drm:dsi_ctrl_set_host_engine_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-20 16:44:06.745 0 0 E : [drm:dsi_display_prepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to enable host engine, rc=-22
01-20 16:44:06.745 0 0 E : [drm:dsi_display_prepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to enable DSI host, rc=-22
01-20 16:44:06.745 0 0 I [drm:dsi_panel_post_unprepare] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-20 16:44:06.754 0 0 E : [drm:dsi_bridge_pre_enable] *ERROR* [msm-dsi-error]: [0] DSI display prepare failed, rc=-22
01-20 16:44:06.759 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-20 16:44:06.759 0 0 E dsi_pll_enable: PLL(0) lock failed
01-20 16:44:06.759 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-20 16:44:06.759 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-20 16:44:06.759 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-20 16:44:06.759 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-20 16:44:06.759 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-20 16:44:06.759 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-20 16:44:06.759 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-20 16:44:06.760 0 0 W [drm] [msm-dsi-warn]: Core refcount is zero for dsi_clk_client
01-20 16:44:06.760 0 0 W [drm] [msm-dsi-warn]: Link refcount is zero for dsi_clk_client
01-20 16:44:06.760 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 0 as panel is not init.
01-20 16:44:11.762 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 397 as panel is not init.
01-20 16:44:12.773 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 0 as panel is not init.
01-20 16:44:12.786 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 0 as panel is not init.
01-20 16:44:12.791 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-20 16:44:12.791 0 0 E dsi_pll_enable: PLL(0) lock failed
01-20 16:44:12.791 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-20 16:44:12.791 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-20 16:44:12.791 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-20 16:44:12.791 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-20 16:44:12.791 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-20 16:44:12.791 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-20 16:44:12.791 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-20 16:44:12.798 0 0 I [drm:dsi_display_disable] [msm-dsi-info]: dsi_display_disable(DSI-1)+
01-20 16:44:12.798 0 0 E : [drm:dsi_display_cmd_engine_disable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] Invalid refcount
01-20 16:44:12.798 0 0 I [drm:dsi_panel_disable] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-20 16:44:12.798 0 0 E : [drm:dsi_ctrl_cmd_transfer] *ERROR* [msm-dsi-error]: dsi-ctrl-0: State error: op=4: 1, 0, 1
01-20 16:44:12.798 0 0 E : [drm:dsi_ctrl_cmd_transfer] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-20 16:44:12.798 0 0 E : [drm:dsi_host_transfer] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] cmd transfer failed, rc=-22
01-20 16:44:12.798 0 0 E : [drm:dsi_panel_tx_cmd_set] *ERROR* [msm-dsi-error]: failed to set cmds(4), rc=-22
01-20 16:44:12.798 0 0 W : [mipi_mot_cmd_csot_1080p_dsc_667] failed to send DSI_CMD_SET_OFF cmds, rc=-22
01-20 16:44:12.798 0 0 I : display 0000000032af03ad, name qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2 is_dsi_mot_primary(0)
01-20 16:44:12.803 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-20 16:44:12.803 0 0 E dsi_pll_enable: PLL(0) lock failed
01-20 16:44:12.803 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-20 16:44:12.803 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-20 16:44:12.803 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-20 16:44:12.803 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-20 16:44:12.803 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-20 16:44:12.803 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-20 16:44:12.803 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-20 16:44:12.803 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable Link clocks, rc=-110
01-20 16:44:12.803 0 0 E : [drm:dsi_ctrl_host_deinit] *ERROR* [msm-dsi-error]: dsi-ctrl-0: No change in state, host_init=0
01-20 16:44:12.803 0 0 E : [drm:dsi_ctrl_host_deinit] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-20 16:44:12.803 0 0 E : [drm:dsi_ctrl_host_deinit] *ERROR* [msm-dsi-error]: dsi-ctrl-0: driver state check failed, rc=-22
01-20 16:44:12.803 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to deinit host_0, rc=-22
01-20 16:44:12.803 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to deinit controller, rc=-22
01-20 16:44:12.803 0 0 W [drm] [msm-dsi-warn]: DSI_0: Turning OFF PHY while PLL is on
01-20 16:44:12.808 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-20 16:44:12.808 0 0 E dsi_pll_enable: PLL(0) lock failed
01-20 16:44:12.808 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-20 16:44:12.808 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-20 16:44:12.808 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-20 16:44:12.808 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-20 16:44:12.808 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-20 16:44:12.808 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-20 16:44:12.808 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-20 16:44:12.808 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable DSI clocks, rc=-110
01-20 16:44:12.808 0 0 I [drm:dsi_panel_post_unprepare] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-20 16:44:12.813 0 0 E : [drm:dsi_pwr_enable_regulator] *ERROR* [msm-dsi-error]: Unbalanced regulator off:vddio
The command transfer failure messages that used to be present in the logcat is nowhere to be found now, but the panel re-initialization still fails. Not sure if the excerpt this time contains anything helpful...
EDIT: Encountered another screen failure. So most likely I'll need to update to 20230121 build which just came out to test further. Here's a logcat excerpt which looked similar to the older logs. Guess the very different looking logcat I had yesterday might be a special case, as this time I once again see errors about dsi command transfer failure.
Spoiler: Another logcat excerpt.
Code:
01-21 15:11:47.094 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:47.294 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:47.494 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:47.694 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:47.894 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:48.094 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:48.295 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:48.494 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:48.694 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:48.894 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:49.094 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:49.294 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:49.494 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:49.694 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:49.894 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:50.094 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:50.294 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:50.494 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:50.694 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:50.895 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:51.094 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:51.294 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:51.494 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:51.694 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:51.894 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:52.094 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:52.294 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:52.494 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:52.814 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:53.014 0 0 E : [drm:dsi_ctrl_dma_cmd_wait_for_done] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Command transfer failed
01-21 15:11:53.014 0 0 E : [drm:dsi_ctrl_hw_cmn_get_cmd_read_data] *ERROR* [msm-dsi-error]: DSI_0: Panel detected error, no data read
01-21 15:11:53.014 0 0 E : [drm:dsi_ctrl_cmd_transfer] *ERROR* [msm-dsi-error]: dsi-ctrl-0: read message failed read length, rc=0
01-21 15:11:53.014 0 0 E : [drm:dsi_display_cmd_mipi_transfer] *ERROR* [msm-dsi-error]: failed to transfer cmd. rc = 0
01-21 15:11:53.014 0 0 E : [drm:dsi_panel_enable] *ERROR* [msm-dsi-error]: Failed to call dsi_display_cmd_transfer. rc=0
01-21 15:11:53.015 0 0 E : [drm:dsi_panel_enable] *ERROR* [msm-dsi-error]: [mipi_mot_cmd_csot_1080p_dsc_667] Failed to read pwr_mode, rc = -5
01-21 15:11:53.015 0 0 E : [drm:dsi_display_enable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to enable DSI panel, rc=-5
01-21 15:11:53.015 0 0 E : [drm:dsi_bridge_pre_enable] *ERROR* [msm-dsi-error]: [0] DSI display enable failed, rc=-5
01-21 15:11:53.015 0 0 I : display 0000000055b57272, name qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2 is_dsi_mot_primary(0)
01-21 15:11:53.015 0 0 I [drm:dsi_panel_post_unprepare] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-21 15:11:53.030 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-21 15:11:53.030 0 0 E dsi_pll_enable: PLL(0) lock failed
01-21 15:11:53.030 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-21 15:11:53.030 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-21 15:11:53.030 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-21 15:11:53.030 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-21 15:11:53.030 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-21 15:11:53.030 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-21 15:11:53.030 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-21 15:11:53.036 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-21 15:11:53.036 0 0 E dsi_pll_enable: PLL(0) lock failed
01-21 15:11:53.036 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-21 15:11:53.036 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-21 15:11:53.036 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-21 15:11:53.036 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-21 15:11:53.036 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-21 15:11:53.036 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-21 15:11:53.036 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-21 15:11:53.036 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 0 as panel is not init.
01-21 15:11:53.042 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 397 as panel is not init.
01-21 15:11:54.053 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 0 as panel is not init.
01-21 15:11:54.064 0 0 I [drm:dsi_display_set_backlight] [msm-dsi-info]: Ignor bl_level 0 as panel is not init.
01-21 15:11:54.069 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-21 15:11:54.069 0 0 E dsi_pll_enable: PLL(0) lock failed
01-21 15:11:54.069 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-21 15:11:54.069 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-21 15:11:54.069 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-21 15:11:54.069 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-21 15:11:54.069 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-21 15:11:54.069 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-21 15:11:54.069 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-21 15:11:54.075 0 0 I [drm:dsi_display_disable] [msm-dsi-info]: dsi_display_disable(DSI-1)+
01-21 15:11:54.075 0 0 E : [drm:dsi_display_cmd_engine_disable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] Invalid refcount
01-21 15:11:54.075 0 0 I [drm:dsi_panel_disable] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-21 15:11:54.075 0 0 E : [drm:dsi_ctrl_check_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: State error: op=1: 1, 0
01-21 15:11:54.075 0 0 E : [drm:dsi_ctrl_set_cmd_engine_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-21 15:11:54.075 0 0 E : [drm:dsi_display_cmd_engine_enable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to enable cmd engine, rc=-22
01-21 15:11:54.075 0 0 E : [drm:dsi_host_transfer] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to enable cmd engine, rc=-22
01-21 15:11:54.075 0 0 E : [drm:dsi_panel_tx_cmd_set] *ERROR* [msm-dsi-error]: failed to set cmds(4), rc=-22
01-21 15:11:54.076 0 0 I : display 0000000055b57272, name qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2 is_dsi_mot_primary(0)
01-21 15:11:54.076 0 0 E : [drm:dsi_ctrl_check_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: No change in state, ctrl_state=0
01-21 15:11:54.076 0 0 E : [drm:dsi_ctrl_set_host_engine_state] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-21 15:11:54.076 0 0 E : [drm:dsi_display_ctrl_host_disable] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable host engine, rc=-22
01-21 15:11:54.076 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable DSI host, rc=-22
01-21 15:11:54.081 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-21 15:11:54.081 0 0 E dsi_pll_enable: PLL(0) lock failed
01-21 15:11:54.081 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-21 15:11:54.081 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-21 15:11:54.081 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-21 15:11:54.081 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-21 15:11:54.081 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-21 15:11:54.081 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-21 15:11:54.081 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-21 15:11:54.081 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable Link clocks, rc=-110
01-21 15:11:54.081 0 0 E : [drm:dsi_ctrl_host_deinit] *ERROR* [msm-dsi-error]: dsi-ctrl-0: No change in state, host_init=0
01-21 15:11:54.081 0 0 E : [drm:dsi_ctrl_host_deinit] *ERROR* [msm-dsi-error]: dsi-ctrl-0: Controller state check failed, rc=-22
01-21 15:11:54.081 0 0 E : [drm:dsi_ctrl_host_deinit] *ERROR* [msm-dsi-error]: dsi-ctrl-0: driver state check failed, rc=-22
01-21 15:11:54.081 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to deinit host_0, rc=-22
01-21 15:11:54.081 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to deinit controller, rc=-22
01-21 15:11:54.081 0 0 W [drm] [msm-dsi-warn]: DSI_0: Turning OFF PHY while PLL is on
01-21 15:11:54.086 0 0 E dsi_pll_7nm_lock_status: DSI PLL(0) lock failed, status=0x00000000
01-21 15:11:54.086 0 0 E dsi_pll_enable: PLL(0) lock failed
01-21 15:11:54.086 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-21 15:11:54.086 0 0 E : [drm:dsi_link_hs_clk_start] *ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-21 15:11:54.086 0 0 E : [drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to turn on master hs link clocks, rc=-110
01-21 15:11:54.086 0 0 E : [drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to start link clk type 2 rc=-110
01-21 15:11:54.086 0 0 E : [drm:dsi_recheck_clk_state] *ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-21 15:11:54.086 0 0 E : [drm:dsi_clk_req_state] *ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-21 15:11:54.086 0 0 E : [drm:dsi_display_clk_ctrl] *ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-21 15:11:54.086 0 0 E : [drm:dsi_display_unprepare] *ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd_v2] failed to disable DSI clocks, rc=-110
01-21 15:11:54.086 0 0 I [drm:dsi_panel_post_unprepare] [msm-dsi-info]: (mipi_mot_cmd_csot_1080p_dsc_667)+
01-21 15:11:54.091 0 0 E : [drm:dsi_pwr_enable_regulator] *ERROR* [msm-dsi-error]: Unbalanced regulator off:vddio
It's been at least six days since I flashed LMODroid 20230121.
So far the system has been running normally. No screen failure observed. Looks like the commit is working.

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